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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +09002/*
3 * include/configs/gose.h
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +09006 */
7
8#ifndef __GOSE_H
9#define __GOSE_H
10
Nobuhiro Iwamatsu5ca6dfe2014-11-10 14:34:07 +090011#include "rcar-gen2-common.h"
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090012
Marek Vasut49aefe32018-04-23 20:24:10 +020013#define STACK_AREA_SIZE 0x00100000
14#define LOW_LEVEL_MERAM_STACK \
Tom Rinieaf6ea62022-05-25 12:16:03 -040015 (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090016
17/* MEMORY */
Nobuhiro Iwamatsu5ca6dfe2014-11-10 14:34:07 +090018#define RCAR_GEN2_SDRAM_BASE 0x40000000
Marek Vasut49aefe32018-04-23 20:24:10 +020019#define RCAR_GEN2_SDRAM_SIZE (1048u * 1024 * 1024)
20#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024)
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090021
Nobuhiro Iwamatsuf0261242014-11-06 15:42:24 +090022/* SH Ether */
Nobuhiro Iwamatsuf0261242014-11-06 15:42:24 +090023#define CONFIG_SH_ETHER_USE_PORT 0
24#define CONFIG_SH_ETHER_PHY_ADDR 0x1
25#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
26#define CONFIG_SH_ETHER_CACHE_WRITEBACK
27#define CONFIG_SH_ETHER_CACHE_INVALIDATE
Marek Vasut49aefe32018-04-23 20:24:10 +020028#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
Nobuhiro Iwamatsuf0261242014-11-06 15:42:24 +090029
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090030/* Board Clock */
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090031
Marek Vasut49aefe32018-04-23 20:24:10 +020032#define CONFIG_EXTRA_ENV_SETTINGS \
Marek Vasut07a80602018-11-27 00:19:03 +010033 "bootm_size=0x10000000\0"
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090034
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090035#endif /* __GOSE_H */