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wdenkc0218802003-03-27 12:09:35 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/inca-ip.h>
26
27
wdenkc0218802003-03-27 12:09:35 +000028/*******************************************************************************
29*
wdenk8bde7f72003-06-27 21:31:46 +000030* get_cpuclk - returns the frequency of the CPU.
wdenkc0218802003-03-27 12:09:35 +000031*
32* Gets the value directly from the INCA-IP hardware.
33*
wdenk8bde7f72003-06-27 21:31:46 +000034* RETURNS:
wdenkc0218802003-03-27 12:09:35 +000035* 150.000.000 for 150 MHz
wdenkef978732004-01-21 20:46:28 +000036* 133.333.333 for 133 Mhz (= 400MHz/3)
37* 100.000.000 for 100 Mhz (= 400MHz/4)
wdenkc0218802003-03-27 12:09:35 +000038* NOTE:
39* This functions should be used by the hardware driver to get the correct
40* frequency of the CPU. Don't use the macros, which are set to init the CPU
41* frequency in the ROM code.
42*/
wdenka2f34be2003-12-27 19:29:48 +000043uint incaip_get_cpuclk (void)
wdenkc0218802003-03-27 12:09:35 +000044{
wdenka2f34be2003-12-27 19:29:48 +000045 /*-------------------------------------------------------------------------*/
46 /* CPU Clock Input Multiplexer (MUX I) */
47 /* Multiplexer MUX I selects the maximum input clock to the CPU. */
48 /*-------------------------------------------------------------------------*/
49 if (*((volatile ulong *) INCA_IP_CGU_CGU_MUXCR) &
50 INCA_IP_CGU_CGU_MUXCR_MUXI) {
51 /* MUX I set to 150 MHz clock */
52 return 150000000;
53 } else {
54 /* MUX I set to 100/133 MHz clock */
55 if (*((volatile ulong *) INCA_IP_CGU_CGU_DIVCR) & 0x40) {
56 /* Division value is 1/3, maximum CPU operating */
57 /* frequency is 133.3 MHz */
wdenkef978732004-01-21 20:46:28 +000058 return 133333333;
wdenka2f34be2003-12-27 19:29:48 +000059 } else {
60 /* Division value is 1/4, maximum CPU operating */
61 /* frequency is 100 MHz */
62 return 100000000;
63 }
64 }
wdenkc0218802003-03-27 12:09:35 +000065}
66
67/*******************************************************************************
68*
wdenk8bde7f72003-06-27 21:31:46 +000069* get_fpiclk - returns the frequency of the FPI bus.
wdenkc0218802003-03-27 12:09:35 +000070*
71* Gets the value directly from the INCA-IP hardware.
72*
73* RETURNS: Frquency in Hz
74*
75* NOTE:
76* This functions should be used by the hardware driver to get the correct
77* frequency of the CPU. Don't use the macros, which are set to init the CPU
78* frequency in the ROM code.
wdenk8bde7f72003-06-27 21:31:46 +000079* The calculation for the
wdenkc0218802003-03-27 12:09:35 +000080*/
wdenka2f34be2003-12-27 19:29:48 +000081uint incaip_get_fpiclk (void)
wdenkc0218802003-03-27 12:09:35 +000082{
wdenka2f34be2003-12-27 19:29:48 +000083 uint clkCPU;
wdenk8bde7f72003-06-27 21:31:46 +000084
wdenka2f34be2003-12-27 19:29:48 +000085 clkCPU = incaip_get_cpuclk ();
wdenk8bde7f72003-06-27 21:31:46 +000086
wdenka2f34be2003-12-27 19:29:48 +000087 switch (*((volatile ulong *) INCA_IP_CGU_CGU_DIVCR) & 0xC) {
88 case 0x4:
89 return clkCPU >> 1; /* devided by 2 */
90 break;
91 case 0x8:
92 return clkCPU >> 2; /* devided by 4 */
93 break;
94 default:
95 return clkCPU;
96 break;
97 }
wdenkc0218802003-03-27 12:09:35 +000098}
wdenk7cb22f92003-12-27 19:24:54 +000099
wdenka2f34be2003-12-27 19:29:48 +0000100int incaip_set_cpuclk (void)
wdenk7cb22f92003-12-27 19:24:54 +0000101{
wdenka2f34be2003-12-27 19:29:48 +0000102 extern void ebu_init(long);
103 extern void cgu_init(long);
wdenk68766092004-01-29 09:22:58 +0000104 extern void sdram_init(long);
wdenk7cb22f92003-12-27 19:24:54 +0000105 uchar tmp[64];
106 ulong cpuclk;
107
wdenka2f34be2003-12-27 19:29:48 +0000108 if (getenv_r ("cpuclk", tmp, sizeof (tmp)) > 0) {
109 cpuclk = simple_strtoul (tmp, NULL, 10) * 1000000;
wdenka2f34be2003-12-27 19:29:48 +0000110 cgu_init (cpuclk);
wdenk68766092004-01-29 09:22:58 +0000111 ebu_init (cpuclk);
112 sdram_init (cpuclk);
wdenk7cb22f92003-12-27 19:24:54 +0000113 }
114
115 return 0;
116}