blob: 9b30d984741c6cbf4b46e667b5b9f5738460cc8d [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babic13402862011-10-07 23:27:34 +00002/*
3 * Porting to u-boot:
4 *
5 * (C) Copyright 2011
6 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
7 *
8 * Copyright (C) 2008-2009 MontaVista Software Inc.
9 * Copyright (C) 2008-2009 Texas Instruments Inc
10 *
11 * Based on the LCD driver for TI Avalanche processors written by
12 * Ajay Singh and Shalom Hai.
Stefano Babic13402862011-10-07 23:27:34 +000013 */
14
15#ifndef DA8XX_FB_H
16#define DA8XX_FB_H
17
18enum panel_type {
Heiko Schocher0017f9e2013-08-03 07:22:48 +020019 QVGA = 0,
20 WVGA
Stefano Babic13402862011-10-07 23:27:34 +000021};
22
23enum panel_shade {
24 MONOCHROME = 0,
25 COLOR_ACTIVE,
26 COLOR_PASSIVE,
27};
28
29enum raster_load_mode {
30 LOAD_DATA = 1,
31 LOAD_PALETTE,
32};
33
34struct display_panel {
35 enum panel_type panel_type; /* QVGA */
36 int max_bpp;
37 int min_bpp;
38 enum panel_shade panel_shade;
39};
40
41struct da8xx_panel {
42 const char name[25]; /* Full name <vendor>_<model> */
43 unsigned short width;
44 unsigned short height;
45 int hfp; /* Horizontal front porch */
46 int hbp; /* Horizontal back porch */
47 int hsw; /* Horizontal Sync Pulse Width */
48 int vfp; /* Vertical front porch */
49 int vbp; /* Vertical back porch */
50 int vsw; /* Vertical Sync Pulse Width */
51 unsigned int pxl_clk; /* Pixel clock */
52 unsigned char invert_pxl_clk; /* Invert Pixel clock */
53};
54
55struct da8xx_lcdc_platform_data {
56 const char manu_name[10];
57 void *controller_data;
58 const char type[25];
59 void (*panel_power_ctrl)(int);
60};
61
62struct lcd_ctrl_config {
63 const struct display_panel *p_disp_panel;
64
65 /* AC Bias Pin Frequency */
66 int ac_bias;
67
68 /* AC Bias Pin Transitions per Interrupt */
69 int ac_bias_intrpt;
70
71 /* DMA burst size */
72 int dma_burst_sz;
73
74 /* Bits per pixel */
75 int bpp;
76
77 /* FIFO DMA Request Delay */
78 int fdd;
79
80 /* TFT Alternative Signal Mapping (Only for active) */
81 unsigned char tft_alt_mode;
82
83 /* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
84 unsigned char stn_565_mode;
85
86 /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
87 unsigned char mono_8bit_mode;
88
89 /* Invert line clock */
90 unsigned char invert_line_clock;
91
92 /* Invert frame clock */
93 unsigned char invert_frm_clock;
94
95 /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
96 unsigned char sync_edge;
97
98 /* Horizontal and Vertical Sync: Control: 0=ignore */
99 unsigned char sync_ctrl;
100
101 /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
102 unsigned char raster_order;
103};
104
105struct lcd_sync_arg {
106 int back_porch;
107 int front_porch;
108 int pulse_width;
109};
110
Heiko Schocher765f2f02013-08-03 07:22:50 +0200111void da8xx_video_init(const struct da8xx_panel *panel,
112 const struct lcd_ctrl_config *lcd_cfg,
113 int bits_pixel);
Stefano Babic13402862011-10-07 23:27:34 +0000114
115#endif /* ifndef DA8XX_FB_H */