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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Marian Balakowicze6f2e902005-10-11 19:09:42 +02002/*
3 * (C) Copyright 2005
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Marian Balakowicze6f2e902005-10-11 19:09:42 +02005 */
6
7/*
8 * TQM8349 board configuration file
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Marian Balakowicze6f2e902005-10-11 19:09:42 +020014/*
15 * High Level Configuration Options
16 */
17#define CONFIG_E300 1 /* E300 Family */
Marian Balakowicze6f2e902005-10-11 19:09:42 +020018
Marian Balakowicze6f2e902005-10-11 19:09:42 +020019/* board pre init: do not call, nothing to do */
Marian Balakowicze6f2e902005-10-11 19:09:42 +020020
21/* detect the number of flash banks */
Marian Balakowicze6f2e902005-10-11 19:09:42 +020022
23/*
24 * DDR Setup
25 */
Joe Hershbergerdf939e12011-10-11 23:57:22 -050026 /* DDR is system memory*/
Mario Six8a81bfd2019-01-21 09:18:15 +010027#define CONFIG_SYS_SDRAM_BASE 0x00000000
Joe Hershbergerdf939e12011-10-11 23:57:22 -050028#define DDR_CASLAT_25 /* CASLAT set to 2.5 */
29#undef CONFIG_DDR_ECC /* only for ECC DDR module */
30#undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup */
Marian Balakowicze6f2e902005-10-11 19:09:42 +020031
Joe Hershbergerdf939e12011-10-11 23:57:22 -050032#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
34#define CONFIG_SYS_MEMTEST_END 0x00100000
Marian Balakowicze6f2e902005-10-11 19:09:42 +020035
36/*
37 * FLASH on the Local Bus
38 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#undef CONFIG_SYS_FLASH_CHECKSUM
40#define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */
41#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */
Joe Hershbergerdf939e12011-10-11 23:57:22 -050042#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */
Marian Balakowicze6f2e902005-10-11 19:09:42 +020043
44/*
45 * FLASH bank number detection
46 */
47
48/*
Joe Hershbergerdf939e12011-10-11 23:57:22 -050049 * When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, the actual number of
50 * Flash banks has to be determined at runtime and stored in a gloabl variable
51 * tqm834x_num_flash_banks. The value of CONFIG_SYS_MAX_FLASH_BANKS_DETECT is
52 * only used instead of CONFIG_SYS_MAX_FLASH_BANKS to allocate the array
53 * flash_info, and should be made sufficiently large to accomodate the number
54 * of banks that might actually be detected. Since most (all?) Flash related
55 * functions use CONFIG_SYS_MAX_FLASH_BANKS as the number of actual banks on
56 * the board, it is defined as tqm834x_num_flash_banks.
Marian Balakowicze6f2e902005-10-11 19:09:42 +020057 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
Marian Balakowicze6f2e902005-10-11 19:09:42 +020059
Joe Hershbergerdf939e12011-10-11 23:57:22 -050060#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */
Marian Balakowicze6f2e902005-10-11 19:09:42 +020061
Marian Balakowicze6f2e902005-10-11 19:09:42 +020062
Marian Balakowicze6f2e902005-10-11 19:09:42 +020063/* disable remaining mappings */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_BR1_PRELIM 0x00000000
65#define CONFIG_SYS_OR1_PRELIM 0x00000000
Marian Balakowicze6f2e902005-10-11 19:09:42 +020066
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_BR2_PRELIM 0x00000000
68#define CONFIG_SYS_OR2_PRELIM 0x00000000
Marian Balakowicze6f2e902005-10-11 19:09:42 +020069
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#define CONFIG_SYS_BR3_PRELIM 0x00000000
71#define CONFIG_SYS_OR3_PRELIM 0x00000000
Marian Balakowicze6f2e902005-10-11 19:09:42 +020072
Marian Balakowicze6f2e902005-10-11 19:09:42 +020073/*
74 * Monitor config
75 */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020076#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
Marian Balakowicze6f2e902005-10-11 19:09:42 +020077
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
Wolfgang Denk4681e672009-05-14 23:18:34 +020079# define CONFIG_SYS_RAMBOOT
Marian Balakowicze6f2e902005-10-11 19:09:42 +020080#else
Wolfgang Denk4681e672009-05-14 23:18:34 +020081# undef CONFIG_SYS_RAMBOOT
Marian Balakowicze6f2e902005-10-11 19:09:42 +020082#endif
83
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020084#define CONFIG_SYS_INIT_RAM_LOCK 1
Joe Hershbergerdf939e12011-10-11 23:57:22 -050085#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */
86#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/
Marian Balakowicze6f2e902005-10-11 19:09:42 +020087
Joe Hershbergerdf939e12011-10-11 23:57:22 -050088#define CONFIG_SYS_GBL_DATA_OFFSET \
89 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Marian Balakowicze6f2e902005-10-11 19:09:42 +020091
Joe Hershbergerdf939e12011-10-11 23:57:22 -050092 /* Reserve 384 kB = 3 sect. for Mon */
93#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
94 /* Reserve 512 kB for malloc */
95#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
Marian Balakowicze6f2e902005-10-11 19:09:42 +020096
97/*
98 * Serial Port
99 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200100#define CONFIG_SYS_NS16550_SERIAL
101#define CONFIG_SYS_NS16550_REG_SIZE 1
102#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200103
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104#define CONFIG_SYS_BAUDRATE_TABLE \
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500105 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200106
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200107#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
108#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200109
110/*
111 * I2C
112 */
Heiko Schocher00f792e2012-10-24 13:48:22 +0200113#define CONFIG_SYS_I2C
114#define CONFIG_SYS_I2C_FSL
115#define CONFIG_SYS_FSL_I2C_SPEED 400000
116#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
117#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200118
119/* I2C EEPROM, configuration for onboard EEPROMs 24C256 and 24C32 */
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500120#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
121#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit */
122#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32 bytes/write */
123#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12 /* 10ms +/- 20% */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200124
125/* I2C RTC */
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500126#define CONFIG_RTC_DS1337 /* use ds1337 rtc via i2c */
127#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200128
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200129/*
130 * TSEC
131 */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200132
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#define CONFIG_SYS_TSEC1_OFFSET 0x24000
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500134#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_TSEC2_OFFSET 0x25000
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500136#define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC2_OFFSET)
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200137
138#if defined(CONFIG_TSEC_ENET)
139
Kim Phillips255a35772007-05-16 16:52:19 -0500140#define CONFIG_TSEC1 1
141#define CONFIG_TSEC1_NAME "TSEC0"
142#define CONFIG_TSEC2 1
143#define CONFIG_TSEC2_NAME "TSEC1"
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500144#define TSEC1_PHY_ADDR 2
145#define TSEC2_PHY_ADDR 1
146#define TSEC1_PHYIDX 0
147#define TSEC2_PHYIDX 0
Andy Fleming3a790132007-08-15 20:03:25 -0500148#define TSEC1_FLAGS TSEC_GIGABIT
149#define TSEC2_FLAGS TSEC_GIGABIT
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200150
151/* Options are: TSEC[0-1] */
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500152#define CONFIG_ETHPRIME "TSEC0"
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200153
154#endif /* CONFIG_TSEC_ENET */
155
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200156#if defined(CONFIG_PCI)
157
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500158#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200159
Rafal Jaworowski6902df52005-10-17 02:39:53 +0200160/* PCI1 host bridge */
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500161#define CONFIG_SYS_PCI1_MEM_BASE 0x90000000
162#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
163#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
164#define CONFIG_SYS_PCI1_MMIO_BASE \
165 (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)
166#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE
167#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */
168#define CONFIG_SYS_PCI1_IO_BASE 0xe2000000
169#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE
170#define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */
Rafal Jaworowski6902df52005-10-17 02:39:53 +0200171
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200172#undef CONFIG_EEPRO100
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200173#define CONFIG_EEPRO100
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200174#undef CONFIG_TULIP
175
176#if !defined(CONFIG_PCI_PNP)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177 #define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BASE
178 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_MEM_BASE
Rafal Jaworowski6902df52005-10-17 02:39:53 +0200179 #define PCI_IDSEL_NUMBER 0x1c /* slot0 (IDSEL) = 28 */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200180#endif
181
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200183
184#endif /* CONFIG_PCI */
185
186/*
187 * Environment
188 */
Wolfgang Denk929b79a2009-05-14 23:18:33 +0200189
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500190#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
191#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200192
Jon Loeliger26946902007-07-04 22:30:50 -0500193/*
Jon Loeligera1aa0bb2007-07-10 09:22:23 -0500194 * BOOTP options
195 */
196#define CONFIG_BOOTP_BOOTFILESIZE
Jon Loeligera1aa0bb2007-07-10 09:22:23 -0500197
Jon Loeligera1aa0bb2007-07-10 09:22:23 -0500198/*
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200199 * Miscellaneous configurable options
200 */
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500201#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200202
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500203#undef CONFIG_WATCHDOG /* watchdog disabled */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200204
205/*
206 * For booting Linux, the board info and command line data
Ira W. Snyder9f530d52010-09-10 15:42:32 -0700207 * have to be in the first 256 MB of memory, since this is
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200208 * the maximum mapped by the Linux kernel during initialization.
209 */
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500210 /* Initial Memory map for Linux */
211#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200212
Kumar Gala9260a562006-01-11 11:12:57 -0600213/* System IO Config */
Kim Phillips3c9b1ee2009-06-05 14:11:33 -0500214#define CONFIG_SYS_SICRH 0
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215#define CONFIG_SYS_SICRL SICRL_LDP_A
Kumar Gala9260a562006-01-11 11:12:57 -0600216
Kumar Gala2688e2f2006-02-10 15:40:06 -0600217/* PCI */
Rafal Jaworowski6fe16a82006-08-18 10:39:11 +0200218#ifdef CONFIG_PCI
Gabor Juhos842033e2013-05-30 07:06:12 +0000219#define CONFIG_PCI_INDIRECT_BRIDGE
Rafal Jaworowski6fe16a82006-08-18 10:39:11 +0200220#endif
Kumar Gala2688e2f2006-02-10 15:40:06 -0600221
Jon Loeliger26946902007-07-04 22:30:50 -0500222#if defined(CONFIG_CMD_KGDB)
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200223#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200224#endif
225
226/*
227 * Environment Configuration
228 */
229
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500230 /* default location for tftp and bootm */
231#define CONFIG_LOADADDR 400000
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200232
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200233#define CONFIG_EXTRA_ENV_SETTINGS \
234 "netdev=eth0\0" \
Wolfgang Denkb931b3a2008-02-14 23:18:01 +0100235 "hostname=tqm834x\0" \
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200236 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100237 "nfsroot=${serverip}:${rootpath}\0" \
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200238 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100239 "addip=setenv bootargs ${bootargs} " \
240 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
241 ":${hostname}:${netdev}:off panic=1\0" \
Joe Hershbergerdf939e12011-10-11 23:57:22 -0500242 "addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
Wolfgang Denk4681e672009-05-14 23:18:34 +0200243 "flash_nfs_old=run nfsargs addip addcons;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100244 "bootm ${kernel_addr}\0" \
Wolfgang Denk4681e672009-05-14 23:18:34 +0200245 "flash_nfs=run nfsargs addip addcons;" \
246 "bootm ${kernel_addr} - ${fdt_addr}\0" \
247 "flash_self_old=run ramargs addip addcons;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100248 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk4681e672009-05-14 23:18:34 +0200249 "flash_self=run ramargs addip addcons;" \
250 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
251 "net_nfs_old=tftp 400000 ${bootfile};" \
252 "run nfsargs addip addcons;bootm\0" \
253 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
254 "tftp ${fdt_addr_r} ${fdt_file}; " \
255 "run nfsargs addip addcons; " \
256 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200257 "rootpath=/opt/eldk/ppc_6xx\0" \
Wolfgang Denk4681e672009-05-14 23:18:34 +0200258 "bootfile=tqm834x/uImage\0" \
259 "fdtfile=tqm834x/tqm834x.dtb\0" \
260 "kernel_addr_r=400000\0" \
261 "fdt_addr_r=600000\0" \
262 "ramdisk_addr_r=800000\0" \
263 "kernel_addr=800C0000\0" \
264 "fdt_addr=800A0000\0" \
265 "ramdisk_addr=80300000\0" \
266 "u-boot=tqm834x/u-boot.bin\0" \
267 "load=tftp 200000 ${u-boot}\0" \
268 "update=protect off 80000000 +${filesize};" \
269 "era 80000000 +${filesize};" \
270 "cp.b 200000 80000000 ${filesize}\0" \
Detlev Zundeld8ab58b2008-03-06 16:45:53 +0100271 "upd=run load update\0" \
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200272 ""
273
274#define CONFIG_BOOTCOMMAND "run flash_self"
275
276/*
277 * JFFS2 partitions
278 */
279/* mtdparts command line support */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200280
281/* default mtd partition table */
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200282#endif /* __CONFIG_H */