blob: 47fb181693247ed209af4c7de2fe25c96983004d [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Alexander Graffa08d392014-04-11 17:09:45 +02002/*
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
Alexander Graffa08d392014-04-11 17:09:45 +02004 */
5
6/*
7 * Corenet DS style board configuration file
8 */
9#ifndef __QEMU_PPCE500_H
10#define __QEMU_PPCE500_H
11
Alexander Graffa08d392014-04-11 17:09:45 +020012#define CONFIG_SYS_MPC85XX_NO_RESETVEC
13
14#define CONFIG_SYS_RAMBOOT
15
Alexander Graffa08d392014-04-11 17:09:45 +020016#define CONFIG_PCI1 1 /* PCI controller 1 */
17#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
18#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
19
20#define CONFIG_ENV_OVERWRITE
21
22#define CONFIG_ENABLE_36BIT_PHYS
23
24#define CONFIG_ADDR_MAP
25#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
26
27#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
28#define CONFIG_SYS_MEMTEST_END 0x00400000
Alexander Graffa08d392014-04-11 17:09:45 +020029
30/* Needed to fill the ccsrbar pointer */
Alexander Graffa08d392014-04-11 17:09:45 +020031
32/* Virtual address to CCSRBAR */
33#define CONFIG_SYS_CCSRBAR 0xe0000000
34/* Physical address should be a function call */
35#ifndef __ASSEMBLY__
36extern unsigned long long get_phys_ccsrbar_addr_early(void);
Alexander Grafe8349752015-03-07 02:10:09 +010037#define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
38#define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
39#else
40#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
41#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
Alexander Graffa08d392014-04-11 17:09:45 +020042#endif
Alexander Grafe8349752015-03-07 02:10:09 +010043
Alexander Graffa08d392014-04-11 17:09:45 +020044/* Virtual address range for PCI region maps */
45#define CONFIG_SYS_PCI_MAP_START 0x80000000
46#define CONFIG_SYS_PCI_MAP_END 0xe8000000
47
48/* Virtual address to a temporary map if we need it (max 128MB) */
49#define CONFIG_SYS_TMPVIRT 0xe8000000
50
51/*
52 * DDR Setup
53 */
54#define CONFIG_VERY_BIG_RAM
55#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
56#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
57
58#define CONFIG_CHIP_SELECTS_PER_CTRL 0
59
60#define CONFIG_SYS_CLK_FREQ 33000000
61
Alexander Graffa08d392014-04-11 17:09:45 +020062#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
63
64#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
65
Alexander Graffa08d392014-04-11 17:09:45 +020066#define CONFIG_HWCONFIG
67
68#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
69#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
70#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
71/* The assembler doesn't like typecast */
72#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
73 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
74 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
75#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
76
77#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
78 GENERATED_GBL_DATA_SIZE)
79#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
80
81#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
82#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
83
Alexander Graffa08d392014-04-11 17:09:45 +020084#define CONFIG_SYS_NS16550_SERIAL
85#define CONFIG_SYS_NS16550_REG_SIZE 1
86#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
87
88#define CONFIG_SYS_BAUDRATE_TABLE \
89 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
90
91#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
92#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
93
Alexander Graffa08d392014-04-11 17:09:45 +020094/*
95 * General PCI
96 * Memory space is mapped 1-1, but I/O space must start from 0.
97 */
98
99#ifdef CONFIG_PCI
100#define CONFIG_PCI_INDIRECT_BRIDGE
Alexander Graffa08d392014-04-11 17:09:45 +0200101
102#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
Alexander Graffa08d392014-04-11 17:09:45 +0200103#endif /* CONFIG_PCI */
104
105#define CONFIG_LBA48
Alexander Graffa08d392014-04-11 17:09:45 +0200106
107/*
108 * Environment
109 */
Alexander Graffa08d392014-04-11 17:09:45 +0200110
111#define CONFIG_LOADS_ECHO /* echo on for serial download */
112
Alexander Graffa08d392014-04-11 17:09:45 +0200113/*
114 * Command line configuration.
115 */
Alexander Graffa08d392014-04-11 17:09:45 +0200116
Alexander Graffa08d392014-04-11 17:09:45 +0200117/*
118 * Miscellaneous configurable options
119 */
Alexander Graffa08d392014-04-11 17:09:45 +0200120#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
Alexander Graffa08d392014-04-11 17:09:45 +0200121
122/*
123 * For booting Linux, the board info and command line data
124 * have to be in the first 64 MB of memory, since this is
125 * the maximum mapped by the Linux kernel during initialization.
126 */
127#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
128#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
129
130/*
131 * Environment Configuration
132 */
133#define CONFIG_ROOTPATH "/opt/nfsroot"
134#define CONFIG_BOOTFILE "uImage"
135#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
136
137/* default location for tftp and bootm */
138#define CONFIG_LOADADDR 1000000
139
Alexander Graffa08d392014-04-11 17:09:45 +0200140#define CONFIG_BOOTCOMMAND \
141 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
142
143#endif /* __QEMU_PPCE500_H */