TsiChungLiew | 4a442d3 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Freescale MCF5329 FireEngine board. |
| 3 | * |
| 4 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. |
| 5 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | /* |
| 27 | * board/config.h - configuration options, board specific |
| 28 | */ |
| 29 | |
| 30 | #ifndef _M5235EVB_H |
| 31 | #define _M5235EVB_H |
| 32 | |
| 33 | /* |
| 34 | * High Level Configuration Options |
| 35 | * (easy to change) |
| 36 | */ |
| 37 | #define CONFIG_MCF523x /* define processor family */ |
| 38 | #define CONFIG_M5235 /* define processor type */ |
| 39 | |
| 40 | #undef DEBUG |
| 41 | |
| 42 | #define CONFIG_MCFUART |
| 43 | #define CFG_UART_PORT (0) |
| 44 | #define CONFIG_BAUDRATE 115200 |
| 45 | #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } |
| 46 | |
| 47 | #undef CONFIG_WATCHDOG |
| 48 | #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ |
| 49 | |
| 50 | /* |
| 51 | * BOOTP options |
| 52 | */ |
| 53 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 54 | #define CONFIG_BOOTP_BOOTPATH |
| 55 | #define CONFIG_BOOTP_GATEWAY |
| 56 | #define CONFIG_BOOTP_HOSTNAME |
| 57 | |
| 58 | /* Command line configuration */ |
| 59 | #include <config_cmd_default.h> |
| 60 | |
| 61 | #define CONFIG_CMD_BOOTD |
| 62 | #define CONFIG_CMD_CACHE |
| 63 | #define CONFIG_CMD_DHCP |
| 64 | #define CONFIG_CMD_ELF |
| 65 | #define CONFIG_CMD_FLASH |
| 66 | #define CONFIG_CMD_I2C |
| 67 | #define CONFIG_CMD_MEMORY |
| 68 | #define CONFIG_CMD_MISC |
| 69 | #define CONFIG_CMD_MII |
| 70 | #define CONFIG_CMD_NET |
| 71 | #define CONFIG_CMD_PCI |
| 72 | #define CONFIG_CMD_PING |
| 73 | #define CONFIG_CMD_REGINFO |
| 74 | |
| 75 | #undef CONFIG_CMD_LOADB |
| 76 | #undef CONFIG_CMD_LOADS |
| 77 | |
| 78 | #define CONFIG_MCFFEC |
| 79 | #ifdef CONFIG_MCFFEC |
| 80 | # define CONFIG_NET_MULTI 1 |
| 81 | # define CONFIG_MII 1 |
| 82 | # define CFG_DISCOVER_PHY |
| 83 | # define CFG_RX_ETH_BUFFER 8 |
| 84 | # define CFG_FAULT_ECHO_LINK_DOWN |
| 85 | |
| 86 | # define CFG_FEC0_PINMUX 0 |
| 87 | # define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE |
| 88 | # define MCFFEC_TOUT_LOOP 50000 |
| 89 | /* If CFG_DISCOVER_PHY is not defined - hardcoded */ |
| 90 | # ifndef CFG_DISCOVER_PHY |
| 91 | # define FECDUPLEX FULL |
| 92 | # define FECSPEED _100BASET |
| 93 | # else |
| 94 | # ifndef CFG_FAULT_ECHO_LINK_DOWN |
| 95 | # define CFG_FAULT_ECHO_LINK_DOWN |
| 96 | # endif |
| 97 | # endif /* CFG_DISCOVER_PHY */ |
| 98 | #endif |
| 99 | |
| 100 | /* Timer */ |
| 101 | #define CONFIG_MCFTMR |
| 102 | #undef CONFIG_MCFPIT |
| 103 | |
| 104 | /* I2C */ |
| 105 | #define CONFIG_FSL_I2C |
| 106 | #define CONFIG_HARD_I2C /* I2C with hw support */ |
| 107 | #undef CONFIG_SOFT_I2C /* I2C bit-banged */ |
| 108 | #define CFG_I2C_SPEED 80000 |
| 109 | #define CFG_I2C_SLAVE 0x7F |
| 110 | #define CFG_I2C_OFFSET 0x00000300 |
| 111 | #define CFG_IMMR CFG_MBAR |
| 112 | |
| 113 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 114 | #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ |
| 115 | #define CONFIG_BOOTFILE "u-boot.bin" |
| 116 | #ifdef CONFIG_MCFFEC |
| 117 | # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 |
| 118 | # define CONFIG_IPADDR 192.162.1.2 |
| 119 | # define CONFIG_NETMASK 255.255.255.0 |
| 120 | # define CONFIG_SERVERIP 192.162.1.1 |
| 121 | # define CONFIG_GATEWAYIP 192.162.1.1 |
| 122 | # define CONFIG_OVERWRITE_ETHADDR_ONCE |
| 123 | #endif /* FEC_ENET */ |
| 124 | |
| 125 | #define CONFIG_HOSTNAME M5235EVB |
| 126 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 127 | "netdev=eth0\0" \ |
| 128 | "loadaddr=10000\0" \ |
| 129 | "u-boot=u-boot.bin\0" \ |
| 130 | "load=tftp ${loadaddr) ${u-boot}\0" \ |
| 131 | "upd=run load; run prog\0" \ |
| 132 | "prog=prot off ffe00000 ffe3ffff;" \ |
| 133 | "era ffe00000 ffe3ffff;" \ |
| 134 | "cp.b ${loadaddr} ffe00000 ${filesize};"\ |
| 135 | "save\0" \ |
| 136 | "" |
| 137 | |
| 138 | #define CONFIG_PRAM 512 /* 512 KB */ |
| 139 | #define CFG_PROMPT "-> " |
| 140 | #define CFG_LONGHELP /* undef to save memory */ |
| 141 | |
| 142 | #if defined(CONFIG_KGDB) |
| 143 | # define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 144 | #else |
| 145 | # define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 146 | #endif |
| 147 | |
| 148 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 149 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 150 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 151 | #define CFG_LOAD_ADDR (CFG_SDRAM_BASE+0x20000) |
| 152 | |
| 153 | #define CFG_HZ 1000 |
| 154 | #define CFG_CLK 75000000 |
| 155 | #define CFG_CPU_CLK CFG_CLK * 2 |
| 156 | |
| 157 | #define CFG_MBAR 0x40000000 |
| 158 | |
| 159 | /* |
| 160 | * Low Level Configuration Settings |
| 161 | * (address mappings, register initial values, etc.) |
| 162 | * You should know what you are doing if you make changes here. |
| 163 | */ |
| 164 | /*----------------------------------------------------------------------- |
| 165 | * Definitions for initial stack pointer and data area (in DPRAM) |
| 166 | */ |
| 167 | #define CFG_INIT_RAM_ADDR 0x20000000 |
| 168 | #define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ |
| 169 | #define CFG_INIT_RAM_CTRL 0x21 |
| 170 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 171 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE - 0x10) |
| 172 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
| 173 | |
| 174 | /*----------------------------------------------------------------------- |
| 175 | * Start addresses for the final memory configuration |
| 176 | * (Set up by the startup code) |
| 177 | * Please note that CFG_SDRAM_BASE _must_ start at 0 |
| 178 | */ |
| 179 | #define CFG_SDRAM_BASE 0x00000000 |
| 180 | #define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ |
| 181 | |
| 182 | #define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 |
| 183 | #define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) |
| 184 | |
| 185 | #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) |
| 186 | #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
| 187 | |
| 188 | #define CFG_BOOTPARAMS_LEN 64*1024 |
| 189 | #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
| 190 | |
| 191 | /* |
| 192 | * For booting Linux, the board info and command line data |
| 193 | * have to be in the first 8 MB of memory, since this is |
| 194 | * the maximum mapped by the Linux kernel during initialization ?? |
| 195 | */ |
| 196 | /* Initial Memory map for Linux */ |
| 197 | #define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) |
| 198 | |
| 199 | /*----------------------------------------------------------------------- |
| 200 | * FLASH organization |
| 201 | */ |
| 202 | #define CFG_FLASH_CFI |
| 203 | #ifdef CFG_FLASH_CFI |
| 204 | # define CFG_FLASH_CFI_DRIVER 1 |
| 205 | # define CFG_FLASH_SIZE 0x800000 /* Max size that the board might have */ |
| 206 | #ifdef NORFLASH_PS32BIT |
| 207 | # define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT |
| 208 | #else |
| 209 | # define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
| 210 | #endif |
| 211 | # define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 212 | # define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ |
| 213 | # define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ |
| 214 | #endif |
| 215 | |
| 216 | #define CFG_FLASH_BASE (CFG_CS0_BASE << 16) |
| 217 | |
| 218 | /* Configuration for environment |
| 219 | * Environment is embedded in u-boot in the second sector of the flash |
| 220 | */ |
| 221 | #define CFG_ENV_IS_IN_FLASH 1 |
| 222 | #define CFG_ENV_IS_EMBEDDED 1 |
| 223 | #ifdef NORFLASH_PS32BIT |
| 224 | # define CFG_ENV_OFFSET (0x8000) |
| 225 | # define CFG_ENV_SIZE 0x4000 |
| 226 | # define CFG_ENV_SECT_SIZE 0x4000 |
| 227 | #else |
| 228 | # define CFG_ENV_OFFSET (0x4000) |
| 229 | # define CFG_ENV_SIZE 0x2000 |
| 230 | # define CFG_ENV_SECT_SIZE 0x2000 |
| 231 | #endif |
| 232 | |
| 233 | /*----------------------------------------------------------------------- |
| 234 | * Cache Configuration |
| 235 | */ |
| 236 | #define CFG_CACHELINE_SIZE 16 |
| 237 | |
| 238 | /*----------------------------------------------------------------------- |
| 239 | * Chipselect bank definitions |
| 240 | */ |
| 241 | /* |
| 242 | * CS0 - NOR Flash 1, 2, 4, or 8MB |
| 243 | * CS1 - Available |
| 244 | * CS2 - Available |
| 245 | * CS3 - Available |
| 246 | * CS4 - Available |
| 247 | * CS5 - Available |
| 248 | * CS6 - Available |
| 249 | * CS7 - Available |
| 250 | */ |
| 251 | #ifdef NORFLASH_PS32BIT |
| 252 | # define CFG_CS0_BASE 0xFFC0 |
| 253 | # define CFG_CS0_MASK 0x003f0001 |
| 254 | # define CFG_CS0_CTRL 0x1D00 |
| 255 | #else |
| 256 | # define CFG_CS0_BASE 0xFFE0 |
| 257 | # define CFG_CS0_MASK 0x001f0001 |
| 258 | # define CFG_CS0_CTRL 0x1D80 |
| 259 | #endif |
| 260 | |
| 261 | #endif /* _M5329EVB_H */ |