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Hideyuki Sano1a31ca42012-06-27 10:35:35 +09001/*
2 * Configuation settings for the bonito board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Hideyuki Sano1a31ca42012-06-27 10:35:35 +09007 */
8
9#ifndef __ARMADILLO_800EVA_H
10#define __ARMADILLO_800EVA_H
11
12#undef DEBUG
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090013#define CONFIG_R8A7740
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090014#define CONFIG_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
15#define CONFIG_SH_GPIO_PFC
16
17#include <asm/arch/rmobile.h>
18
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090019#define CONFIG_CMD_DFL
20#define CONFIG_CMD_SDRAM
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090021#define CONFIG_CMD_MII
22#define CONFIG_CMD_PING
23#define CONFIG_CMD_DHCP
Nobuhiro Iwamatsuca2fbea2012-08-09 15:39:33 +090024#define CONFIG_CMD_BOOTZ
Nobuhiro Iwamatsu09a3be02012-08-09 15:38:47 +090025
26#define CONFIG_OF_LIBFDT
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090027#define BOARD_LATE_INIT
28
29#define CONFIG_BAUDRATE 115200
30#define CONFIG_BOOTDELAY 3
31#define CONFIG_BOOTARGS ""
32
33#define CONFIG_VERSION_VARIABLE
34#undef CONFIG_SHOW_BOOT_PROGRESS
35
36#define CONFIG_ARCH_CPU_INIT
37#define CONFIG_DISPLAY_CPUINFO
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090038#define CONFIG_DISPLAY_BOARDINFO
39#define CONFIG_BOARD_EARLY_INIT_F
40#define CONFIG_USE_ARCH_MEMSET
41#define CONFIG_USE_ARCH_MEMCPY
42#define CONFIG_TMU_TIMER
43#define CONFIG_SYS_DCACHE_OFF
44
45/* STACK */
46#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
47#define STACK_AREA_SIZE 0xC000
48#define LOW_LEVEL_MERAM_STACK \
49 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
50
51/* MEMORY */
52#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
53#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
54
55#define CONFIG_SYS_LONGHELP
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090056#define CONFIG_SYS_CBSIZE 256
57#define CONFIG_SYS_PBSIZE 256
58#define CONFIG_SYS_MAXARGS 16
59#define CONFIG_SYS_BARGSIZE 512
60#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
61
62/* SCIF */
63#define CONFIG_SCIF_CONSOLE
64#define CONFIG_CONS_SCIF1
65#define SCIF0_BASE 0xe6c40000
66#define SCIF1_BASE 0xe6c50000
67#define SCIF2_BASE 0xe6c60000
68#define SCIF4_BASE 0xe6c80000
69#define CONFIG_SCIF_A
70#undef CONFIG_SYS_CONSOLE_INFO_QUIET
71#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
72#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
73
74#define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE)
75#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
76 504 * 1024 * 1024)
77#undef CONFIG_SYS_ALT_MEMTEST
78#undef CONFIG_SYS_MEMTEST_SCRATCH
79#undef CONFIG_SYS_LOADS_BAUD_CHANGE
80
81#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
82#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
83#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
84 64 * 1024 * 1024)
85#define CONFIG_NR_DRAM_BANKS 1
86
87#define CONFIG_SYS_MONITOR_BASE 0x00000000
88#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
89#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090090#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
91#define CONFIG_SYS_TEXT_BASE 0xE80C0000
92
93/* FLASH */
94#define CONFIG_SYS_NO_FLASH
95#define CONFIG_SYS_FLASH_CFI
96#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
97#define CONFIG_SYS_FLASH_BASE 0x00000000
98#define CONFIG_SYS_MAX_FLASH_SECT 512
99#define CONFIG_SYS_MAX_FLASH_BANKS 1
100#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
101
102#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
103#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
104#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
105#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
106
107/* ENV setting */
108#define CONFIG_ENV_IS_IN_FLASH
109#define CONFIG_ENV_OVERWRITE 1
110#define CONFIG_ENV_SECT_SIZE (128 * 1024)
111#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
112 CONFIG_SYS_MONITOR_LEN)
113#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
114#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
115#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
116
117/* SH Ether */
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900118#define CONFIG_SH_ETHER
119#define CONFIG_SH_ETHER_USE_PORT 0
120#define CONFIG_SH_ETHER_PHY_ADDR 0x0
121#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
122#define CONFIG_SH_ETHER_SH7734_MII (0x01)
123#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
124#define CONFIG_PHYLIB
125#define CONFIG_PHY_SMSC
126#define CONFIG_BITBANGMII
127#define CONFIG_BITBANGMII_MULTI
128
129/* Board Clock */
130#define CONFIG_SYS_CLK_FREQ 50000000
Nobuhiro Iwamatsu717ceb62013-09-30 10:30:41 +0900131#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
132#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900133#define CONFIG_SYS_TMU_CLK_DIV 4
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900134
135#endif /* __ARMADILLO_800EVA_H */