blob: ff13a9f2dde835c2992aed361e2a1fa88c6714a9 [file] [log] [blame]
TsiChung Liew8e585f02007-06-18 13:50:13 -05001/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
TsiChung Liew536e7da2008-10-22 11:38:21 +00005 * (C) Copyright 2004-2008 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
TsiChung Liew8e585f02007-06-18 13:50:13 -05008 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#include <config.h>
Peter Tyser561858e2008-11-03 09:30:59 -060028#include <timestamp.h>
TsiChung Liew8e585f02007-06-18 13:50:13 -050029#include "version.h"
30
31#ifndef CONFIG_IDENT_STRING
32#define CONFIG_IDENT_STRING ""
33#endif
34
35#define _START _start
36#define _FAULT _fault
37
TsiChung Liew8e585f02007-06-18 13:50:13 -050038#define SAVE_ALL \
39 move.w #0x2700,%sr; /* disable intrs */ \
40 subl #60,%sp; /* space for 15 regs */ \
41 moveml %d0-%d7/%a0-%a6,%sp@;
42
43#define RESTORE_ALL \
44 moveml %sp@,%d0-%d7/%a0-%a6; \
45 addl #60,%sp; /* space for 15 regs */ \
46 rte;
47
TsiChung Liew8e585f02007-06-18 13:50:13 -050048.text
49/*
50 * Vector table. This is used for initial platform startup.
51 * These vectors are to catch any un-intended traps.
52 */
53_vectors:
54
TsiChungLiewddd104f2007-07-05 23:06:55 -050055INITSP: .long 0x00000000 /* Initial SP */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020056INITPC: .long _START /* Initial PC */
TsiChungLiewddd104f2007-07-05 23:06:55 -050057vector02: .long _FAULT /* Access Error */
58vector03: .long _FAULT /* Address Error */
59vector04: .long _FAULT /* Illegal Instruction */
60vector05: .long _FAULT /* Reserved */
61vector06: .long _FAULT /* Reserved */
62vector07: .long _FAULT /* Reserved */
63vector08: .long _FAULT /* Privilege Violation */
64vector09: .long _FAULT /* Trace */
65vector0A: .long _FAULT /* Unimplemented A-Line */
66vector0B: .long _FAULT /* Unimplemented F-Line */
67vector0C: .long _FAULT /* Debug Interrupt */
68vector0D: .long _FAULT /* Reserved */
69vector0E: .long _FAULT /* Format Error */
70vector0F: .long _FAULT /* Unitialized Int. */
TsiChung Liew8e585f02007-06-18 13:50:13 -050071
TsiChungLiewddd104f2007-07-05 23:06:55 -050072/* Reserved */
TsiChung Liew8e585f02007-06-18 13:50:13 -050073vector10_17:
74.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75
TsiChungLiewddd104f2007-07-05 23:06:55 -050076vector18: .long _FAULT /* Spurious Interrupt */
77vector19: .long _FAULT /* Autovector Level 1 */
78vector1A: .long _FAULT /* Autovector Level 2 */
79vector1B: .long _FAULT /* Autovector Level 3 */
80vector1C: .long _FAULT /* Autovector Level 4 */
81vector1D: .long _FAULT /* Autovector Level 5 */
82vector1E: .long _FAULT /* Autovector Level 6 */
83vector1F: .long _FAULT /* Autovector Level 7 */
TsiChung Liew8e585f02007-06-18 13:50:13 -050084
85/* TRAP #0 - #15 */
86vector20_2F:
87.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89
90/* Reserved */
91vector30_3F:
92.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94
95vector64_127:
96.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
103.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
104
105vector128_191:
106.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114
115vector192_255:
116.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
123.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
124
125 .text
126
127 .globl _start
128_start:
129 nop
130 nop
TsiChungLiewddd104f2007-07-05 23:06:55 -0500131 move.w #0x2700,%sr /* Mask off Interrupt */
TsiChung Liew8e585f02007-06-18 13:50:13 -0500132
TsiChungLiewddd104f2007-07-05 23:06:55 -0500133 /* Set vector base register at the beginning of the Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134 move.l #CONFIG_SYS_FLASH_BASE, %d0
TsiChung Liew8e585f02007-06-18 13:50:13 -0500135 movec %d0, %VBR
136
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
TsiChungLiewc67e12e2007-10-25 17:12:36 -0500138 movec %d0, %RAMBAR1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500139
140 /* invalidate and disable cache */
141 move.l #0x01000000, %d0 /* Invalidate cache cmd */
142 movec %d0, %CACR /* Invalidate cache */
143 move.l #0, %d0
144 movec %d0, %ACR0
145 movec %d0, %ACR1
146
TsiChung Liew536e7da2008-10-22 11:38:21 +0000147#ifdef CONFIG_MCF5301x
148 move.l #(0xFC0a0010), %a0
149 move.w (%a0), %d0
150 and.l %d0, 0xEFFF
151
152 move.w %d0, (%a0)
153#endif
154
TsiChung Liew8e585f02007-06-18 13:50:13 -0500155 /* initialize general use internal ram */
156 move.l #0, %d0
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200157 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
158 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
TsiChung Liew8e585f02007-06-18 13:50:13 -0500159 move.l %d0, (%a1)
160 move.l %d0, (%a2)
161
TsiChungLiewddd104f2007-07-05 23:06:55 -0500162 /* set stackpointer to end of internal ram to get some stackspace for the
163 first c-code */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
TsiChung Liew8e585f02007-06-18 13:50:13 -0500165 clr.l %sp@-
166
TsiChungLiewddd104f2007-07-05 23:06:55 -0500167 move.l #__got_start, %a5 /* put relocation table address to a5 */
TsiChung Liew8e585f02007-06-18 13:50:13 -0500168
TsiChungLiewddd104f2007-07-05 23:06:55 -0500169 bsr cpu_init_f /* run low-level CPU init code (from flash) */
170 bsr board_init_f /* run low-level board init code (from flash) */
TsiChung Liew8e585f02007-06-18 13:50:13 -0500171
172 /* board_init_f() does not return */
173
174/*------------------------------------------------------------------------------*/
175
176/*
177 * void relocate_code (addr_sp, gd, addr_moni)
178 *
179 * This "function" does not return, instead it continues in RAM
180 * after relocating the monitor code.
181 *
182 * r3 = dest
183 * r4 = src
184 * r5 = length in bytes
185 * r6 = cachelinesize
186 */
187 .globl relocate_code
188relocate_code:
189 link.w %a6,#0
190 move.l 8(%a6), %sp /* set new stack pointer */
191
192 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
193 move.l 16(%a6), %a0 /* Save copy of Destination Address */
194
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195 move.l #CONFIG_SYS_MONITOR_BASE, %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500196 move.l #__init_end, %a2
197 move.l %a0, %a3
198
199 /* copy the code to RAM */
2001:
201 move.l (%a1)+, (%a3)+
202 cmp.l %a1,%a2
203 bgt.s 1b
204
205/*
206 * We are done. Do not return, instead branch to second part of board
207 * initialization, now running from RAM.
208 */
209 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500211 jmp (%a1)
212
213in_ram:
214
215clear_bss:
216 /*
217 * Now clear BSS segment
218 */
219 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500221 move.l %a0, %d1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
TsiChung Liew8e585f02007-06-18 13:50:13 -05002236:
224 clr.l (%a1)+
225 cmp.l %a1,%d1
226 bgt.s 6b
227
228 /*
229 * fix got table in RAM
230 */
231 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500233 move.l %a1,%a5 /* * fix got pointer register a5 */
234
235 move.l %a0, %a2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200236 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
TsiChung Liew8e585f02007-06-18 13:50:13 -0500237
2387:
239 move.l (%a1),%d1
240 sub.l #_start,%d1
241 add.l %a0,%d1
242 move.l %d1,(%a1)+
243 cmp.l %a2, %a1
244 bne 7b
245
246 /* calculate relative jump to board_init_r in ram */
247 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500249
250 /* set parameters for board_init_r */
251 move.l %a0,-(%sp) /* dest_addr */
252 move.l %d0,-(%sp) /* gd */
253 jsr (%a1)
254
255/*------------------------------------------------------------------------------*/
256/* exception code */
257 .globl _fault
258_fault:
259 jmp _fault
260 .globl _exc_handler
261
262_exc_handler:
263 SAVE_ALL
264 movel %sp,%sp@-
265 bsr exc_handler
266 addql #4,%sp
267 RESTORE_ALL
268
269 .globl _int_handler
270_int_handler:
271 SAVE_ALL
272 movel %sp,%sp@-
273 bsr int_handler
274 addql #4,%sp
275 RESTORE_ALL
276
277/*------------------------------------------------------------------------------*/
278/* cache functions */
279 .globl icache_enable
280icache_enable:
281 move.l #0x01000000, %d0 /* Invalidate cache cmd */
282 movec %d0, %CACR /* Invalidate cache */
Wolfgang Wegner992d7122009-10-28 15:11:00 -0500283 move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0) << 11)), %d0
TsiChung Liew8e585f02007-06-18 13:50:13 -0500284 movec %d0, %ACR0 /* Enable cache */
TsiChung Liew8e585f02007-06-18 13:50:13 -0500285
TsiChungLiewddd104f2007-07-05 23:06:55 -0500286 move.l #0x80000200, %d0 /* Setup cache mask */
TsiChung Liew8e585f02007-06-18 13:50:13 -0500287 movec %d0, %CACR /* Enable cache */
TsiChungLiewddd104f2007-07-05 23:06:55 -0500288 nop
TsiChung Liew8e585f02007-06-18 13:50:13 -0500289
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200290 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500291 moveq #1, %d0
292 move.l %d0, (%a1)
293 rts
294
295 .globl icache_disable
296icache_disable:
TsiChung0dca8742007-07-10 15:45:43 -0500297 move.l #0x01000000, %d0 /* Setup cache mask */
298 movec %d0, %CACR /* Disable cache */
TsiChung Liew8e585f02007-06-18 13:50:13 -0500299 clr.l %d0 /* Setup cache mask */
TsiChung0dca8742007-07-10 15:45:43 -0500300 movec %d0, %ACR0
301 movec %d0, %ACR1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500302
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200303 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500304 moveq #0, %d0
305 move.l %d0, (%a1)
306 rts
307
308 .globl icache_status
309icache_status:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200310 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500311 move.l (%a1), %d0
312 rts
313
314 .globl icache_invalid
315icache_invalid:
TsiChung0dca8742007-07-10 15:45:43 -0500316 move.l #0x81000200, %d0 /* Setup cache mask */
TsiChung Liew8e585f02007-06-18 13:50:13 -0500317 movec %d0, %CACR /* Enable cache */
318 rts
319
320 .globl dcache_enable
321dcache_enable:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200322 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500323 moveq #1, %d0
324 move.l %d0, (%a1)
325 rts
326
327 /* No dcache, just a dummy function */
328 .globl dcache_disable
329dcache_disable:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200330 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500331 moveq #0, %d0
332 move.l %d0, (%a1)
333 rts
334
335 .globl dcache_status
336dcache_status:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200337 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
TsiChung Liew8e585f02007-06-18 13:50:13 -0500338 move.l (%a1), %d0
339 rts
340
341/*------------------------------------------------------------------------------*/
342
343 .globl version_string
344version_string:
345 .ascii U_BOOT_VERSION
Peter Tyser561858e2008-11-03 09:30:59 -0600346 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
TsiChung Liew8e585f02007-06-18 13:50:13 -0500347 .ascii CONFIG_IDENT_STRING, "\0"
TsiChung Liew9b464322008-03-28 08:47:45 -0500348 .align 4