blob: fa995d0ca1f209a1ef71c8ace158cb4450179983 [file] [log] [blame]
Mugunthan V Ne5520e12015-09-22 18:45:12 +05301/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 * Based on "omap4.dtsi"
8 */
9
10#include "dra7.dtsi"
11
12/ {
13 compatible = "ti,dra742", "ti,dra74", "ti,dra7";
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu0: cpu@0 {
20 device_type = "cpu";
21 compatible = "arm,cortex-a15";
22 reg = <0>;
23
24 operating-points = <
25 /* kHz uV */
26 1000000 1060000
27 1176000 1160000
28 >;
29
30 clocks = <&dpll_mpu_ck>;
31 clock-names = "cpu";
32
33 clock-latency = <300000>; /* From omap-cpufreq driver */
34
35 /* cooling options */
36 cooling-min-level = <0>;
37 cooling-max-level = <2>;
38 #cooling-cells = <2>; /* min followed by max */
39 };
40 cpu@1 {
41 device_type = "cpu";
42 compatible = "arm,cortex-a15";
43 reg = <1>;
44 };
45 };
46
47 pmu {
48 compatible = "arm,cortex-a15-pmu";
49 interrupt-parent = <&wakeupgen>;
50 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
51 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
52 };
53
54 ocp {
55 omap_dwc3_4: omap_dwc3_4@48940000 {
56 compatible = "ti,dwc3";
57 ti,hwmods = "usb_otg_ss4";
58 reg = <0x48940000 0x10000>;
59 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
60 #address-cells = <1>;
61 #size-cells = <1>;
62 utmi-mode = <2>;
63 ranges;
64 status = "disabled";
65 usb4: usb@48950000 {
66 compatible = "snps,dwc3";
67 reg = <0x48950000 0x17000>;
68 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
69 tx-fifo-resize;
70 maximum-speed = "high-speed";
71 dr_mode = "otg";
72 };
73 };
74 };
75};
76
77&dss {
78 reg = <0x58000000 0x80>,
79 <0x58004054 0x4>,
80 <0x58004300 0x20>,
81 <0x58005054 0x4>,
82 <0x58005300 0x20>;
83 reg-names = "dss", "pll1_clkctrl", "pll1",
84 "pll2_clkctrl", "pll2";
85
86 clocks = <&dss_dss_clk>,
87 <&dss_video1_clk>,
88 <&dss_video2_clk>;
89 clock-names = "fck", "video1_clk", "video2_clk";
90};