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wdenka562e1b2005-01-09 18:21:42 +00001/*
2 * Configuation settings for the Sentec Cobra Board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/* ---
26 * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
27 * Date: 2004-03-29
28 * Author: Florian Schlote
29 *
30 * For a description of configuration options please refer also to the
31 * general u-boot-1.x.x/README file
32 * ---
33 */
34
35/* ---
36 * board/config.h - configuration options, board specific
37 * ---
38 */
39
40#ifndef _CONFIG_COBRA5272_H
41#define _CONFIG_COBRA5272_H
42
43/* ---
44 * Define processor
45 * possible values for Sentec board: only Coldfire M5272 processor supported
46 * (please do not change)
47 * ---
48 */
49
50#define CONFIG_MCF52x2 /* define processor family */
51#define CONFIG_M5272 /* define processor type */
52
53/* ---
54 * Defines processor clock - important for correct timings concerning serial
55 * interface etc.
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020056 * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
wdenka562e1b2005-01-09 18:21:42 +000057 * ---
58 */
59
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_HZ 1000
61#define CONFIG_SYS_CLK 66000000
62#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
wdenka562e1b2005-01-09 18:21:42 +000063
64/* ---
65 * Enable use of Ethernet
66 * ---
67 */
TsiChungLiew67064242007-08-15 19:41:06 -050068#define CONFIG_MCFFEC
wdenka562e1b2005-01-09 18:21:42 +000069
TsiChungLiew67064242007-08-15 19:41:06 -050070/* Enable Dma Timer */
71#define CONFIG_MCFTMR
wdenka562e1b2005-01-09 18:21:42 +000072
73/* ---
74 * Define baudrate for UART1 (console output, tftp, ...)
75 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
wdenka562e1b2005-01-09 18:21:42 +000077 * interface
78 * ---
79 */
80
TsiChungLiew67064242007-08-15 19:41:06 -050081#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_UART_PORT (0)
wdenka562e1b2005-01-09 18:21:42 +000083#define CONFIG_BAUDRATE 19200
wdenka562e1b2005-01-09 18:21:42 +000084
85/* ---
86 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
87 * timeout acc. to your needs
88 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
89 * for 10 sec
90 * ---
91 */
92
93#if 0
94#define CONFIG_WATCHDOG
95#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
96#endif
97
98/* ---
99 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
100 * bootloader residing in flash ('chainloading'); if you want to use
101 * chainloading or want to compile a u-boot binary that can be loaded into
102 * RAM via BDM set
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200103 * "#if 0" to "#if 1"
wdenka562e1b2005-01-09 18:21:42 +0000104 * You will need a first stage bootloader then, e. g. colilo or a working BDM
105 * cable (Background Debug Mode)
106 *
107 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
108 *
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200109 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
wdenka562e1b2005-01-09 18:21:42 +0000110 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
111 *
112 * ---
113 */
114
115#if 0
116#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
117#endif
118
119/* ---
120 * Configuration for environment
121 * Environment is embedded in u-boot in the second sector of the flash
122 * ---
123 */
124
125#ifndef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200126#define CONFIG_ENV_OFFSET 0x4000
127#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200128#define CONFIG_ENV_IS_IN_FLASH 1
wdenka562e1b2005-01-09 18:21:42 +0000129#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200130#define CONFIG_ENV_ADDR 0xffe04000
131#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200132#define CONFIG_ENV_IS_IN_FLASH 1
wdenka562e1b2005-01-09 18:21:42 +0000133#endif
134
Jon Loeliger37e4f242007-07-04 22:31:56 -0500135
136/*
Jon Loeliger80ff4f92007-07-10 09:29:01 -0500137 * BOOTP options
138 */
139#define CONFIG_BOOTP_BOOTFILESIZE
140#define CONFIG_BOOTP_BOOTPATH
141#define CONFIG_BOOTP_GATEWAY
142#define CONFIG_BOOTP_HOSTNAME
143
144
145/*
Jon Loeliger37e4f242007-07-04 22:31:56 -0500146 * Command line configuration.
wdenka562e1b2005-01-09 18:21:42 +0000147 */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500148#include <config_cmd_default.h>
wdenka562e1b2005-01-09 18:21:42 +0000149
Jon Loeliger37e4f242007-07-04 22:31:56 -0500150#define CONFIG_CMD_PING
wdenka562e1b2005-01-09 18:21:42 +0000151
Jon Loeliger37e4f242007-07-04 22:31:56 -0500152#undef CONFIG_CMD_LOADS
153#undef CONFIG_CMD_LOADB
154#undef CONFIG_CMD_MII
155
TsiChungLiew67064242007-08-15 19:41:06 -0500156#ifdef CONFIG_MCFFEC
TsiChungLiew67064242007-08-15 19:41:06 -0500157# define CONFIG_MII 1
TsiChung Liew0f3ba7e2008-03-30 01:22:13 -0500158# define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159# define CONFIG_SYS_DISCOVER_PHY
160# define CONFIG_SYS_RX_ETH_BUFFER 8
161# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew67064242007-08-15 19:41:06 -0500162
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163# define CONFIG_SYS_FEC0_PINMUX 0
164# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200165# define MCFFEC_TOUT_LOOP 50000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
167# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiew67064242007-08-15 19:41:06 -0500168# define FECDUPLEX FULL
169# define FECSPEED _100BASET
170# else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
172# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew67064242007-08-15 19:41:06 -0500173# endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiew67064242007-08-15 19:41:06 -0500175#endif
wdenka562e1b2005-01-09 18:21:42 +0000176
177/*
178 *-----------------------------------------------------------------------------
179 * Define user parameters that have to be customized most likely
180 *-----------------------------------------------------------------------------
181 */
182
183/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
184
185#define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
186seconds u-boot will wait before starting defined (auto-)boot command, setting
187to -1 disables delay, setting to 0 will too prevent access to u-boot command
188interface: u-boot then has to reflashed */
189
190
191/* The following settings will be contained in the environment block ; if you
192want to use a neutral environment all those settings can be manually set in
193u-boot: 'set' command */
194
195#if 0
196
197#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
198enter a valid image address in flash */
199
200#define CONFIG_BOOTARGS " " /* default bootargs that are
201considered during boot */
202
203/* User network settings */
204
205#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */
206#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
207#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
208
209#endif
210
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#define CONFIG_SYS_PROMPT "COBRA > " /* Layout of u-boot prompt*/
wdenka562e1b2005-01-09 18:21:42 +0000212
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200213#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
wdenka562e1b2005-01-09 18:21:42 +0000214from which user programs will be started */
215
216/*---*/
217
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_LONGHELP /* undef to save memory */
wdenka562e1b2005-01-09 18:21:42 +0000219
Jon Loeliger37e4f242007-07-04 22:31:56 -0500220#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenka562e1b2005-01-09 18:21:42 +0000222#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenka562e1b2005-01-09 18:21:42 +0000224#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200225#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
226#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
227#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenka562e1b2005-01-09 18:21:42 +0000228
229/*
230 *-----------------------------------------------------------------------------
231 * End of user parameters to be customized
232 *-----------------------------------------------------------------------------
233 */
234
235/* ---
236 * Defines memory range for test
237 * ---
238 */
239
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200240#define CONFIG_SYS_MEMTEST_START 0x400
241#define CONFIG_SYS_MEMTEST_END 0x380000
wdenka562e1b2005-01-09 18:21:42 +0000242
243/* ---
244 * Low Level Configuration Settings
245 * (address mappings, register initial values, etc.)
246 * You should know what you are doing if you make changes here.
247 * ---
248 */
249
250/* ---
251 * Base register address
252 * ---
253 */
254
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
wdenka562e1b2005-01-09 18:21:42 +0000256
257/* ---
258 * System Conf. Reg. & System Protection Reg.
259 * ---
260 */
261
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200262#define CONFIG_SYS_SCR 0x0003
263#define CONFIG_SYS_SPR 0xffff
wdenka562e1b2005-01-09 18:21:42 +0000264
265/* ---
266 * Ethernet settings
267 * ---
268 */
269
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200270#define CONFIG_SYS_DISCOVER_PHY
271#define CONFIG_SYS_ENET_BD_BASE 0x780000
wdenka562e1b2005-01-09 18:21:42 +0000272
273/*-----------------------------------------------------------------------
274 * Definitions for initial stack pointer and data area (in internal SRAM)
275 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200276#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk553f0982010-10-26 13:32:32 +0200277#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200278#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200279#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenka562e1b2005-01-09 18:21:42 +0000280
281/*-----------------------------------------------------------------------
282 * Start addresses for the final memory configuration
283 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200284 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenka562e1b2005-01-09 18:21:42 +0000285 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#define CONFIG_SYS_SDRAM_BASE 0x00000000
wdenka562e1b2005-01-09 18:21:42 +0000287
288/*
289 *-------------------------------------------------------------------------
290 * RAM SIZE (is defined above)
291 *-----------------------------------------------------------------------
292 */
293
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200294/* #define CONFIG_SYS_SDRAM_SIZE 16 */
wdenka562e1b2005-01-09 18:21:42 +0000295
296/*
297 *-----------------------------------------------------------------------
298 */
299
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200300#define CONFIG_SYS_FLASH_BASE 0xffe00000
wdenka562e1b2005-01-09 18:21:42 +0000301
302#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200303#define CONFIG_SYS_MONITOR_BASE 0x20000
wdenka562e1b2005-01-09 18:21:42 +0000304#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200305#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
wdenka562e1b2005-01-09 18:21:42 +0000306#endif
307
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200308#define CONFIG_SYS_MONITOR_LEN 0x20000
309#define CONFIG_SYS_MALLOC_LEN (256 << 10)
310#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
wdenka562e1b2005-01-09 18:21:42 +0000311
312/*
313 * For booting Linux, the board info and command line data
314 * have to be in the first 8 MB of memory, since this is
315 * the maximum mapped by the Linux kernel during initialization ??
316 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200317#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenka562e1b2005-01-09 18:21:42 +0000318
319/*-----------------------------------------------------------------------
320 * FLASH organization
321 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200322#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
323#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
324#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
wdenka562e1b2005-01-09 18:21:42 +0000325
326/*-----------------------------------------------------------------------
327 * Cache Configuration
328 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200329#define CONFIG_SYS_CACHELINE_SIZE 16
wdenka562e1b2005-01-09 18:21:42 +0000330
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600331#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200332 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600333#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200334 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600335#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
336#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
337 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
338 CF_ACR_EN | CF_ACR_SM_ALL)
339#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
340 CF_CACR_DISD | CF_CACR_INVI | \
341 CF_CACR_CEIB | CF_CACR_DCM | \
342 CF_CACR_EUSP)
343
wdenka562e1b2005-01-09 18:21:42 +0000344/*-----------------------------------------------------------------------
345 * Memory bank definitions
346 *
347 * Please refer also to Motorola Coldfire user manual - Chapter XXX
348 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
349 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200350#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
351#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
wdenka562e1b2005-01-09 18:21:42 +0000352
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200353#define CONFIG_SYS_BR1_PRELIM 0
354#define CONFIG_SYS_OR1_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000355
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200356#define CONFIG_SYS_BR2_PRELIM 0
357#define CONFIG_SYS_OR2_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000358
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200359#define CONFIG_SYS_BR3_PRELIM 0
360#define CONFIG_SYS_OR3_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000361
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200362#define CONFIG_SYS_BR4_PRELIM 0
363#define CONFIG_SYS_OR4_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000364
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200365#define CONFIG_SYS_BR5_PRELIM 0
366#define CONFIG_SYS_OR5_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000367
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200368#define CONFIG_SYS_BR6_PRELIM 0
369#define CONFIG_SYS_OR6_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000370
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200371#define CONFIG_SYS_BR7_PRELIM 0x00000701
372#define CONFIG_SYS_OR7_PRELIM 0xFF00007C
wdenka562e1b2005-01-09 18:21:42 +0000373
374/*-----------------------------------------------------------------------
375 * LED config
376 */
377#define LED_STAT_0 0xffff /*all LEDs off*/
378#define LED_STAT_1 0xfffe
379#define LED_STAT_2 0xfffd
380#define LED_STAT_3 0xfffb
381#define LED_STAT_4 0xfff7
382#define LED_STAT_5 0xffef
383#define LED_STAT_6 0xffdf
384#define LED_STAT_7 0xff00 /*all LEDs on*/
385
386/*-----------------------------------------------------------------------
387 * Port configuration (GPIO)
388 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200389#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
wdenka562e1b2005-01-09 18:21:42 +0000390GPIO*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200391#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
wdenka562e1b2005-01-09 18:21:42 +0000392(1^=output, 0^=input) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200393#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
394#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
wdenka562e1b2005-01-09 18:21:42 +0000395configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200396#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
397#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
398#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
wdenka562e1b2005-01-09 18:21:42 +0000399
400#endif /* _CONFIG_COBRA5272_H */