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Bartlomiej Sieka53d4a492007-02-09 10:45:42 +01001/*
2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * modified for Promess PRO - by Andy Joseph, andy@promessdev.com
6 * modified for Promess PRO-Motion - by Robert McCullough, rob@promessdev.com
7 * modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
Wolfgang Denk8ed44d92008-10-19 02:35:50 +02008 * Also changed the refresh for 100MHz operation
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +01009 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +010011 */
12
13#include <common.h>
14#include <mpc5xxx.h>
Bartlomiej Siekac00125e2007-05-27 16:58:45 +020015#include <miiphy.h>
Grant Likelycf2817a2007-09-06 09:46:23 -060016#include <libfdt.h>
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +010017
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +020018#if defined(CONFIG_STATUS_LED)
19#include <status_led.h>
20#endif /* CONFIG_STATUS_LED */
21
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +010022/* Kollmorgen DPR initialization data */
23struct init_elem {
24 unsigned long addr;
25 unsigned len;
26 char *data;
27 } init_seq[] = {
28 {0x500003F2, 2, "\x86\x00"}, /* HW parameter */
29 {0x500003F0, 2, "\x00\x00"},
30 {0x500003EC, 4, "\x00\x80\xc1\x52"}, /* Magic word */
31 };
32
33/*
34 * Initialize Kollmorgen DPR
35 */
36static void kollmorgen_init(void)
37{
38 unsigned i, j;
39 vu_char *p;
40
41 for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) {
42 p = (vu_char *)init_seq[i].addr;
43 for (j = 0; j < init_seq[i].len; ++j)
44 *(p + j) = *(init_seq[i].data + j);
45 }
46
47 printf("DPR: Kollmorgen DPR initialized\n");
48}
49
50
51/*
52 * Early board initalization.
53 */
54int board_early_init_r(void)
55{
56 /* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */
57 *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25);
58 *(vu_long *)MPC5XXX_ADDECR |= (1 << 16);
59
60 /* Initialize Kollmorgen DPR */
61 kollmorgen_init();
62
63 return 0;
64}
65
66
Bartlomiej Siekac00125e2007-05-27 16:58:45 +020067/*
68 * Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(),
69 * PHY goes into FX mode. To take it out of the FX mode and switch into
70 * desired TX operation, one needs to clear the FX_SEL bit of Mode Control
71 * Register.
72 */
73void reset_phy(void)
74{
75 unsigned short mode_control;
76
Heiko Schocher48690d82010-07-20 17:45:02 +020077 miiphy_read("FEC", CONFIG_PHY_ADDR, 0x15, &mode_control);
78 miiphy_write("FEC", CONFIG_PHY_ADDR, 0x15,
Bartlomiej Siekac00125e2007-05-27 16:58:45 +020079 mode_control & 0xfffe);
80 return;
81}
82
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083#ifndef CONFIG_SYS_RAMBOOT
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +010084/*
85 * Helper function to initialize SDRAM controller.
86 */
Bartlomiej Sieka70492882007-05-27 17:26:46 +020087static void sdram_start(int hi_addr)
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +010088{
89 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
90
91 /* unlock mode register */
92 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
93 hi_addr_bit;
94
95 /* precharge all banks */
96 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
97 hi_addr_bit;
98
99 /* auto refresh */
100 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
101 hi_addr_bit;
102
103 /* auto refresh, second time */
104 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
105 hi_addr_bit;
106
107 /* set mode register */
108 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
109
110 /* normal operation */
111 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
112}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113#endif /* !CONFIG_SYS_RAMBOOT */
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100114
115
116/*
117 * Initalize SDRAM - configure SDRAM controller, detect memory size.
118 */
Becky Bruce9973e3c2008-06-09 16:03:40 -0500119phys_size_t initdram(int board_type)
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100120{
121 ulong dramsize = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122#ifndef CONFIG_SYS_RAMBOOT
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100123 ulong test1, test2;
124
Bartlomiej Siekaeff50192007-10-23 11:36:07 +0200125 /* According to AN3221 (MPC5200B SDRAM Initialization and
126 * Configuration), the SDelay register must be written a value of
127 * 0x00000004 as the first step of the SDRAM contorller configuration.
128 */
129 *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
130
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100131 /* configure SDRAM start/end for detection */
132 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
133 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
134
135 /* setup config registers */
136 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
137 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
138
139 sdram_start(0);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140 test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100141 sdram_start(1);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142 test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100143 if (test1 > test2) {
144 sdram_start(0);
145 dramsize = test1;
146 } else {
147 dramsize = test2;
148 }
149
150 /* memory smaller than 1MB is impossible */
151 if (dramsize < (1 << 20))
152 dramsize = 0;
153
154 /* set SDRAM CS0 size according to the amount of RAM found */
Wolfgang Denk74357112007-02-27 14:26:04 +0100155 if (dramsize > 0) {
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100156 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
157 __builtin_ffs(dramsize >> 20) - 1;
Wolfgang Denk74357112007-02-27 14:26:04 +0100158 } else {
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100159 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
Wolfgang Denk74357112007-02-27 14:26:04 +0100160 }
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100161
162 /* let SDRAM CS1 start right after CS0 and disable it */
163 *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize;
164
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#else /* !CONFIG_SYS_RAMBOOT */
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100166 /* retrieve size of memory connected to SDRAM CS0 */
167 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
168 if (dramsize >= 0x13)
169 dramsize = (1 << (dramsize - 0x13)) << 20;
170 else
171 dramsize = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#endif /* CONFIG_SYS_RAMBOOT */
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100173
174 /* return total ram size */
175 return dramsize;
176}
177
178
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200179int checkboard(void)
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100180{
Bartlomiej Siekac75e6392007-05-27 16:55:23 +0200181 uchar rev = *(vu_char *)CPLD_REV_REGISTER;
182 printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev);
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100183 return 0;
184}
Bartlomiej Sieka1f1369c2007-05-08 09:21:57 +0200185
186
Grant Likelycf2817a2007-09-06 09:46:23 -0600187#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
Simon Glasse895a4b2014-10-23 18:58:47 -0600188int ft_board_setup(void *blob, bd_t *bd)
Bartlomiej Sieka1f1369c2007-05-08 09:21:57 +0200189{
190 ft_cpu_setup(blob, bd);
Simon Glasse895a4b2014-10-23 18:58:47 -0600191
192 return 0;
Bartlomiej Sieka1f1369c2007-05-08 09:21:57 +0200193}
Grant Likelycf2817a2007-09-06 09:46:23 -0600194#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200195
196
197#if defined(CONFIG_STATUS_LED)
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200198void __led_init(led_id_t regaddr, int state)
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200199{
200 *((vu_long *) regaddr) |= ENABLE_GPIO_OUT;
201
202 if (state == STATUS_LED_ON)
203 *((vu_long *) regaddr) |= LED_ON;
204 else
205 *((vu_long *) regaddr) &= ~LED_ON;
206}
207
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200208void __led_set(led_id_t regaddr, int state)
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200209{
210 if (state == STATUS_LED_ON)
211 *((vu_long *) regaddr) |= LED_ON;
212 else
213 *((vu_long *) regaddr) &= ~LED_ON;
214}
215
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200216void __led_toggle(led_id_t regaddr)
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200217{
218 *((vu_long *) regaddr) ^= LED_ON;
219}
220#endif /* CONFIG_STATUS_LED */