blob: 66fd9cad8725b067ce9427500020232c2e72813f [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This provides a bit-banged interface to the ethernet MII management
26 * channel.
27 */
28
29#include <common.h>
30#include <miiphy.h>
31
Marian Balakowicz63ff0042005-10-28 22:30:33 +020032#include <asm/types.h>
33#include <linux/list.h>
34#include <malloc.h>
35#include <net.h>
36
37/* local debug macro */
Marian Balakowicz63ff0042005-10-28 22:30:33 +020038#undef MII_DEBUG
39
40#undef debug
41#ifdef MII_DEBUG
42#define debug(fmt,args...) printf (fmt ,##args)
43#else
44#define debug(fmt,args...)
45#endif /* MII_DEBUG */
46
47struct mii_dev {
48 struct list_head link;
49 char *name;
Larry Johnson298035d2007-10-31 11:21:29 -050050 int (*read) (char *devname, unsigned char addr,
51 unsigned char reg, unsigned short *value);
52 int (*write) (char *devname, unsigned char addr,
53 unsigned char reg, unsigned short value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +020054};
55
56static struct list_head mii_devs;
57static struct mii_dev *current_mii;
58
59/*****************************************************************************
60 *
Marian Balakowiczd9785c12005-11-30 18:06:04 +010061 * Initialize global data. Need to be called before any other miiphy routine.
62 */
Larry Johnson298035d2007-10-31 11:21:29 -050063void miiphy_init ()
Marian Balakowiczd9785c12005-11-30 18:06:04 +010064{
Larry Johnson298035d2007-10-31 11:21:29 -050065 INIT_LIST_HEAD (&mii_devs);
66 current_mii = NULL;
Marian Balakowiczd9785c12005-11-30 18:06:04 +010067}
68
69/*****************************************************************************
70 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +020071 * Register read and write MII access routines for the device <name>.
72 */
Larry Johnson298035d2007-10-31 11:21:29 -050073void miiphy_register (char *name,
74 int (*read) (char *devname, unsigned char addr,
75 unsigned char reg, unsigned short *value),
76 int (*write) (char *devname, unsigned char addr,
77 unsigned char reg, unsigned short value))
Marian Balakowicz63ff0042005-10-28 22:30:33 +020078{
79 struct list_head *entry;
80 struct mii_dev *new_dev;
81 struct mii_dev *miidev;
Marian Balakowicz63ff0042005-10-28 22:30:33 +020082 unsigned int name_len;
83
Marian Balakowicz63ff0042005-10-28 22:30:33 +020084 /* check if we have unique name */
Larry Johnson298035d2007-10-31 11:21:29 -050085 list_for_each (entry, &mii_devs) {
86 miidev = list_entry (entry, struct mii_dev, link);
87 if (strcmp (miidev->name, name) == 0) {
88 printf ("miiphy_register: non unique device name "
89 "'%s'\n", name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +020090 return;
91 }
92 }
93
94 /* allocate memory */
Larry Johnson298035d2007-10-31 11:21:29 -050095 name_len = strlen (name);
96 new_dev =
97 (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1);
Marian Balakowicz63ff0042005-10-28 22:30:33 +020098
Larry Johnson298035d2007-10-31 11:21:29 -050099 if (new_dev == NULL) {
100 printf ("miiphy_register: cannot allocate memory for '%s'\n",
101 name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200102 return;
103 }
Larry Johnson298035d2007-10-31 11:21:29 -0500104 memset (new_dev, 0, sizeof (struct mii_dev) + name_len);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200105
106 /* initalize mii_dev struct fields */
Larry Johnson298035d2007-10-31 11:21:29 -0500107 INIT_LIST_HEAD (&new_dev->link);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200108 new_dev->read = read;
109 new_dev->write = write;
110 new_dev->name = (char *)(new_dev + 1);
Larry Johnson298035d2007-10-31 11:21:29 -0500111 strncpy (new_dev->name, name, name_len);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200112 new_dev->name[name_len] = '\0';
113
Larry Johnson298035d2007-10-31 11:21:29 -0500114 debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
115 new_dev->name, new_dev->read, new_dev->write);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200116
117 /* add it to the list */
Larry Johnson298035d2007-10-31 11:21:29 -0500118 list_add_tail (&new_dev->link, &mii_devs);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200119
120 if (!current_mii)
121 current_mii = new_dev;
122}
123
Larry Johnson298035d2007-10-31 11:21:29 -0500124int miiphy_set_current_dev (char *devname)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200125{
126 struct list_head *entry;
127 struct mii_dev *dev;
128
Larry Johnson298035d2007-10-31 11:21:29 -0500129 list_for_each (entry, &mii_devs) {
130 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200131
Larry Johnson298035d2007-10-31 11:21:29 -0500132 if (strcmp (devname, dev->name) == 0) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200133 current_mii = dev;
134 return 0;
135 }
136 }
137
Larry Johnson298035d2007-10-31 11:21:29 -0500138 printf ("No such device: %s\n", devname);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200139 return 1;
140}
141
Larry Johnson298035d2007-10-31 11:21:29 -0500142char *miiphy_get_current_dev ()
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200143{
144 if (current_mii)
145 return current_mii->name;
146
147 return NULL;
148}
149
150/*****************************************************************************
151 *
152 * Read to variable <value> from the PHY attached to device <devname>,
153 * use PHY address <addr> and register <reg>.
154 *
155 * Returns:
156 * 0 on success
157 */
Larry Johnson298035d2007-10-31 11:21:29 -0500158int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
159 unsigned short *value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200160{
161 struct list_head *entry;
162 struct mii_dev *dev;
163 int found_dev = 0;
164 int read_ret = 0;
165
166 if (!devname) {
Larry Johnson298035d2007-10-31 11:21:29 -0500167 printf ("NULL device name!\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200168 return 1;
169 }
170
Larry Johnson298035d2007-10-31 11:21:29 -0500171 list_for_each (entry, &mii_devs) {
172 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200173
Larry Johnson298035d2007-10-31 11:21:29 -0500174 if (strcmp (devname, dev->name) == 0) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200175 found_dev = 1;
Larry Johnson298035d2007-10-31 11:21:29 -0500176 read_ret = dev->read (devname, addr, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200177 break;
178 }
179 }
180
181 if (found_dev == 0)
Larry Johnson298035d2007-10-31 11:21:29 -0500182 printf ("No such device: %s\n", devname);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200183
184 return ((found_dev) ? read_ret : 1);
185}
186
187/*****************************************************************************
188 *
189 * Write <value> to the PHY attached to device <devname>,
190 * use PHY address <addr> and register <reg>.
191 *
192 * Returns:
193 * 0 on success
194 */
Larry Johnson298035d2007-10-31 11:21:29 -0500195int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
196 unsigned short value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200197{
198 struct list_head *entry;
199 struct mii_dev *dev;
200 int found_dev = 0;
201 int write_ret = 0;
202
203 if (!devname) {
Larry Johnson298035d2007-10-31 11:21:29 -0500204 printf ("NULL device name!\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200205 return 1;
206 }
207
Larry Johnson298035d2007-10-31 11:21:29 -0500208 list_for_each (entry, &mii_devs) {
209 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200210
Larry Johnson298035d2007-10-31 11:21:29 -0500211 if (strcmp (devname, dev->name) == 0) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200212 found_dev = 1;
Larry Johnson298035d2007-10-31 11:21:29 -0500213 write_ret = dev->write (devname, addr, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200214 break;
215 }
216 }
217
218 if (found_dev == 0)
Larry Johnson298035d2007-10-31 11:21:29 -0500219 printf ("No such device: %s\n", devname);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200220
221 return ((found_dev) ? write_ret : 1);
222}
223
224/*****************************************************************************
225 *
226 * Print out list of registered MII capable devices.
227 */
Larry Johnson298035d2007-10-31 11:21:29 -0500228void miiphy_listdev (void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200229{
230 struct list_head *entry;
231 struct mii_dev *dev;
232
Larry Johnson298035d2007-10-31 11:21:29 -0500233 puts ("MII devices: ");
234 list_for_each (entry, &mii_devs) {
235 dev = list_entry (entry, struct mii_dev, link);
236 printf ("'%s' ", dev->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200237 }
Larry Johnson298035d2007-10-31 11:21:29 -0500238 puts ("\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200239
240 if (current_mii)
Larry Johnson298035d2007-10-31 11:21:29 -0500241 printf ("Current device: '%s'\n", current_mii->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200242}
243
wdenkc6097192002-11-03 00:24:07 +0000244/*****************************************************************************
245 *
246 * Read the OUI, manufacture's model number, and revision number.
247 *
248 * OUI: 22 bits (unsigned int)
249 * Model: 6 bits (unsigned char)
250 * Revision: 4 bits (unsigned char)
251 *
252 * Returns:
253 * 0 on success
254 */
Larry Johnson298035d2007-10-31 11:21:29 -0500255int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000256 unsigned char *model, unsigned char *rev)
257{
258 unsigned int reg = 0;
wdenk8bf3b002003-12-06 23:20:41 +0000259 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000260
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200261 if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900262 debug ("PHY ID register 2 read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000263 return (-1);
264 }
wdenk8bf3b002003-12-06 23:20:41 +0000265 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000266
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900267 debug ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
268
wdenkc6097192002-11-03 00:24:07 +0000269 if (reg == 0xFFFF) {
270 /* No physical device present at this address */
271 return (-1);
272 }
273
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200274 if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900275 debug ("PHY ID register 1 read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000276 return (-1);
277 }
wdenk8bf3b002003-12-06 23:20:41 +0000278 reg |= tmp << 16;
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900279 debug ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
280
Larry Johnson298035d2007-10-31 11:21:29 -0500281 *oui = (reg >> 10);
282 *model = (unsigned char)((reg >> 4) & 0x0000003F);
283 *rev = (unsigned char)(reg & 0x0000000F);
wdenkc6097192002-11-03 00:24:07 +0000284 return (0);
285}
286
wdenkc6097192002-11-03 00:24:07 +0000287/*****************************************************************************
288 *
289 * Reset the PHY.
290 * Returns:
291 * 0 on success
292 */
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200293int miiphy_reset (char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000294{
295 unsigned short reg;
296 int loop_cnt;
297
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200298 if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900299 debug ("PHY status read failed\n");
Wolfgang Denkf89920c2005-08-12 23:15:53 +0200300 return (-1);
301 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200302 if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) {
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900303 debug ("PHY reset failed\n");
wdenkc6097192002-11-03 00:24:07 +0000304 return (-1);
305 }
wdenk5653fc32004-02-08 22:55:38 +0000306#ifdef CONFIG_PHY_RESET_DELAY
307 udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
308#endif
wdenkc6097192002-11-03 00:24:07 +0000309 /*
310 * Poll the control register for the reset bit to go to 0 (it is
311 * auto-clearing). This should happen within 0.5 seconds per the
312 * IEEE spec.
313 */
314 loop_cnt = 0;
315 reg = 0x8000;
316 while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200317 if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900318 debug ("PHY status read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000319 return (-1);
320 }
321 }
322 if ((reg & 0x8000) == 0) {
323 return (0);
324 } else {
wdenk4b9206e2004-03-23 22:14:11 +0000325 puts ("PHY reset timed out\n");
wdenkc6097192002-11-03 00:24:07 +0000326 return (-1);
327 }
328 return (0);
329}
330
wdenkc6097192002-11-03 00:24:07 +0000331/*****************************************************************************
332 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500333 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000334 */
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200335int miiphy_speed (char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000336{
Larry Johnson71bc6e62007-11-01 08:46:50 -0500337 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000338
wdenk6fb6af62004-03-23 23:20:24 +0000339#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500340 u16 btsr;
341
342 /*
343 * Check for 1000BASE-X. If it is supported, then assume that the speed
344 * is 1000.
345 */
346 if (miiphy_is_1000base_x (devname, addr)) {
347 return _1000BASET;
348 }
349 /*
350 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
351 */
352 /* Check for 1000BASE-T. */
353 if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
354 printf ("PHY 1000BT status");
355 goto miiphy_read_failed;
356 }
357 if (btsr != 0xFFFF &&
358 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) {
359 return _1000BASET;
wdenk855a4962004-03-14 18:23:55 +0000360 }
wdenk6fb6af62004-03-23 23:20:24 +0000361#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000362
wdenka56bd922004-06-06 23:13:55 +0000363 /* Check Basic Management Control Register first. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500364 if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
365 printf ("PHY speed");
366 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000367 }
wdenka56bd922004-06-06 23:13:55 +0000368 /* Check if auto-negotiation is on. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500369 if (bmcr & PHY_BMCR_AUTON) {
wdenka56bd922004-06-06 23:13:55 +0000370 /* Get auto-negotiation results. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500371 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
372 printf ("PHY AN speed");
373 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000374 }
Larry Johnson71bc6e62007-11-01 08:46:50 -0500375 return (anlpar & PHY_ANLPAR_100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000376 }
377 /* Get speed from basic control settings. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500378 return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000379
Larry Johnson71bc6e62007-11-01 08:46:50 -0500380 miiphy_read_failed:
381 printf (" read failed, assuming 10BASE-T\n");
382 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000383}
384
wdenkc6097192002-11-03 00:24:07 +0000385/*****************************************************************************
386 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500387 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000388 */
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200389int miiphy_duplex (char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000390{
Larry Johnson71bc6e62007-11-01 08:46:50 -0500391 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000392
wdenk6fb6af62004-03-23 23:20:24 +0000393#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500394 u16 btsr;
395
396 /* Check for 1000BASE-X. */
397 if (miiphy_is_1000base_x (devname, addr)) {
398 /* 1000BASE-X */
399 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
400 printf ("1000BASE-X PHY AN duplex");
401 goto miiphy_read_failed;
402 }
403 }
404 /*
405 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
406 */
407 /* Check for 1000BASE-T. */
408 if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
409 printf ("PHY 1000BT status");
410 goto miiphy_read_failed;
411 }
412 if (btsr != 0xFFFF) {
413 if (btsr & PHY_1000BTSR_1000FD) {
414 return FULL;
415 } else if (btsr & PHY_1000BTSR_1000HD) {
416 return HALF;
wdenk855a4962004-03-14 18:23:55 +0000417 }
418 }
wdenk6fb6af62004-03-23 23:20:24 +0000419#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000420
wdenka56bd922004-06-06 23:13:55 +0000421 /* Check Basic Management Control Register first. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500422 if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
423 puts ("PHY duplex");
424 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000425 }
wdenka56bd922004-06-06 23:13:55 +0000426 /* Check if auto-negotiation is on. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500427 if (bmcr & PHY_BMCR_AUTON) {
wdenka56bd922004-06-06 23:13:55 +0000428 /* Get auto-negotiation results. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500429 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
430 puts ("PHY AN duplex");
431 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000432 }
Larry Johnson71bc6e62007-11-01 08:46:50 -0500433 return (anlpar & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) ?
434 FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000435 }
436 /* Get speed from basic control settings. */
Larry Johnson71bc6e62007-11-01 08:46:50 -0500437 return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000438
Larry Johnson71bc6e62007-11-01 08:46:50 -0500439 miiphy_read_failed:
440 printf (" read failed, assuming half duplex\n");
441 return HALF;
442}
443
444/*****************************************************************************
445 *
446 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
447 * 1000BASE-T, or on error.
448 */
449int miiphy_is_1000base_x (char *devname, unsigned char addr)
450{
451#if defined(CONFIG_PHY_GIGE)
452 u16 exsr;
453
454 if (miiphy_read (devname, addr, PHY_EXSR, &exsr)) {
455 printf ("PHY extended status read failed, assuming no "
456 "1000BASE-X\n");
457 return 0;
458 }
459 return 0 != (exsr & (PHY_EXSR_1000XF | PHY_EXSR_1000XH));
460#else
461 return 0;
462#endif
wdenkc6097192002-11-03 00:24:07 +0000463}
464
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200465#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenkfc3e2162003-10-08 22:33:00 +0000466/*****************************************************************************
467 *
468 * Determine link status
469 */
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200470int miiphy_link (char *devname, unsigned char addr)
wdenkfc3e2162003-10-08 22:33:00 +0000471{
472 unsigned short reg;
473
wdenka3d991b2004-04-15 21:48:45 +0000474 /* dummy read; needed to latch some phys */
Larry Johnson298035d2007-10-31 11:21:29 -0500475 (void)miiphy_read (devname, addr, PHY_BMSR, &reg);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200476 if (miiphy_read (devname, addr, PHY_BMSR, &reg)) {
wdenk4b9206e2004-03-23 22:14:11 +0000477 puts ("PHY_BMSR read failed, assuming no link\n");
wdenkfc3e2162003-10-08 22:33:00 +0000478 return (0);
479 }
480
481 /* Determine if a link is active */
482 if ((reg & PHY_BMSR_LS) != 0) {
483 return (1);
484 } else {
485 return (0);
486 }
487}
488#endif