blob: cf6fa7c936dcc54f2f7776bce9bfb5090e11e8eb [file] [log] [blame]
Scott Woodc97cd1b2012-09-20 19:02:18 -05001/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
4 *
5 * Copyright 2009 Freescale Semiconductor, Inc.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include "config.h" /* CONFIG_BOARDDIR */
27
28OUTPUT_ARCH(powerpc)
29SECTIONS
30{
31 . = CONFIG_SPL_TEXT_BASE;
32 .text : {
33 *(.text*)
34 }
35 _etext = .;
36
37 .reloc : {
38 _GOT2_TABLE_ = .;
39 KEEP(*(.got2))
40 KEEP(*(.got))
41 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
42 _FIXUP_TABLE_ = .;
43 KEEP(*(.fixup))
44 }
45 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
46 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
47
48 . = ALIGN(8);
49 .data : {
50 *(.rodata*)
51 *(.data*)
52 *(.sdata*)
53 }
54 _edata = .;
55
56 . = ALIGN(8);
57 __init_begin = .;
58 __init_end = .;
59/* FIXME for non-NAND SPL */
60#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
61 .bootpg ADDR(.text) + 0x1000 :
62 {
Prabhakar Kushwaha3a881792013-04-16 13:27:59 +053063 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Scott Woodc97cd1b2012-09-20 19:02:18 -050064 }
65#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
66#elif defined(CONFIG_FSL_ELBC)
67#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
68#else
69#error unknown NAND controller
70#endif
71 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
72 KEEP(*(.resetvec))
73 } = 0xffff
74
75 /*
76 * Make sure that the bss segment isn't linked at 0x0, otherwise its
77 * address won't be updated during relocation fixups.
78 */
79 . |= 0x10;
80
81 __bss_start = .;
82 .bss : {
83 *(.sbss*)
84 *(.bss*)
85 }
Simon Glass3929fb02013-03-14 06:54:53 +000086 __bss_end = .;
Scott Woodc97cd1b2012-09-20 19:02:18 -050087}