Stefano Babic | f9c6fac | 2011-11-30 23:56:52 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 |
| 3 | * Stefano Babic, DENX Software Engineering, sbabic@denx.de. |
| 4 | * |
| 5 | * Copyright (C) 2009 TechNexion Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc. |
| 20 | */ |
| 21 | |
| 22 | #ifndef __TAM3517_H |
| 23 | #define __TAM3517_H |
| 24 | |
| 25 | /* |
| 26 | * High Level Configuration Options |
| 27 | */ |
| 28 | #define CONFIG_OMAP /* in a TI OMAP core */ |
| 29 | #define CONFIG_OMAP34XX /* which is a 34XX */ |
| 30 | |
| 31 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
| 32 | |
| 33 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
| 34 | |
| 35 | #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ |
| 36 | |
| 37 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 38 | #include <asm/arch/omap3.h> |
| 39 | |
| 40 | /* |
| 41 | * Display CPU and Board information |
| 42 | */ |
| 43 | #define CONFIG_DISPLAY_CPUINFO |
| 44 | #define CONFIG_DISPLAY_BOARDINFO |
| 45 | |
| 46 | /* Clock Defines */ |
| 47 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 48 | #define V_SCLK (V_OSCK >> 1) |
| 49 | |
| 50 | #undef CONFIG_USE_IRQ /* no support for IRQs */ |
| 51 | #define CONFIG_MISC_INIT_R |
| 52 | |
| 53 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 54 | #define CONFIG_SETUP_MEMORY_TAGS |
| 55 | #define CONFIG_INITRD_TAG |
| 56 | #define CONFIG_REVISION_TAG |
| 57 | |
| 58 | /* |
| 59 | * Size of malloc() pool |
| 60 | */ |
| 61 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ |
| 62 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ |
| 63 | 2 * 1024 * 1024) |
| 64 | /* |
| 65 | * DDR related |
| 66 | */ |
| 67 | #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */ |
| 68 | #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) |
| 69 | |
| 70 | /* |
| 71 | * Hardware drivers |
| 72 | */ |
| 73 | |
| 74 | /* |
| 75 | * NS16550 Configuration |
| 76 | */ |
| 77 | #define CONFIG_SYS_NS16550 |
| 78 | #define CONFIG_SYS_NS16550_SERIAL |
| 79 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 80 | #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 81 | |
| 82 | /* |
| 83 | * select serial console configuration |
| 84 | */ |
| 85 | #define CONFIG_CONS_INDEX 1 |
| 86 | #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 |
| 87 | #define CONFIG_SERIAL1 /* UART1 */ |
| 88 | |
| 89 | /* allow to overwrite serial and ethaddr */ |
| 90 | #define CONFIG_ENV_OVERWRITE |
| 91 | #define CONFIG_BAUDRATE 115200 |
| 92 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 93 | 115200} |
| 94 | #define CONFIG_MMC |
| 95 | #define CONFIG_OMAP_HSMMC |
| 96 | #define CONFIG_GENERIC_MMC |
| 97 | #define CONFIG_DOS_PARTITION |
| 98 | |
| 99 | /* EHCI */ |
| 100 | #define CONFIG_OMAP3_GPIO_5 |
| 101 | #define CONFIG_USB_EHCI |
| 102 | #define CONFIG_USB_EHCI_OMAP |
| 103 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 |
| 104 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 |
| 105 | #define CONFIG_USB_STORAGE |
| 106 | |
| 107 | /* #define CONFIG_EHCI_DCACHE */ |
| 108 | |
| 109 | /* commands to include */ |
| 110 | #include <config_cmd_default.h> |
| 111 | |
| 112 | #define CONFIG_CMD_CACHE |
| 113 | #define CONFIG_CMD_DHCP |
| 114 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
| 115 | #define CONFIG_CMD_FAT /* FAT support */ |
| 116 | #define CONFIG_CMD_GPIO |
| 117 | #define CONFIG_CMD_I2C /* I2C serial bus support */ |
| 118 | #define CONFIG_CMD_MII |
| 119 | #define CONFIG_CMD_MMC /* MMC support */ |
| 120 | #define CONFIG_CMD_NET |
| 121 | #define CONFIG_CMD_NFS |
| 122 | #define CONFIG_CMD_NAND /* NAND support */ |
| 123 | #define CONFIG_CMD_PING |
| 124 | #define CONFIG_CMD_USB |
| 125 | |
| 126 | #undef CONFIG_CMD_FLASH /* only NAND on the SOM */ |
| 127 | #undef CONFIG_CMD_IMLS |
| 128 | |
| 129 | #define CONFIG_SYS_NO_FLASH |
| 130 | #define CONFIG_HARD_I2C |
| 131 | #define CONFIG_SYS_I2C_SPEED 400000 |
| 132 | #define CONFIG_SYS_I2C_SLAVE 1 |
| 133 | #define CONFIG_SYS_I2C_BUS 0 |
| 134 | #define CONFIG_SYS_I2C_BUS_SELECT 1 |
| 135 | #define CONFIG_DRIVER_OMAP34XX_I2C |
| 136 | |
| 137 | |
| 138 | /* |
| 139 | * Board NAND Info. |
| 140 | */ |
| 141 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
| 142 | /* to access */ |
| 143 | /* nand at CS0 */ |
| 144 | |
| 145 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ |
| 146 | /* NAND devices */ |
| 147 | #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ |
| 148 | |
| 149 | #define CONFIG_AUTO_COMPLETE |
| 150 | |
| 151 | /* |
| 152 | * Miscellaneous configurable options |
| 153 | */ |
| 154 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 155 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
| 156 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| 157 | #define CONFIG_CMDLINE_EDITING |
| 158 | #define CONFIG_AUTO_COMPLETE |
| 159 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
| 160 | |
| 161 | /* Print Buffer Size */ |
| 162 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 163 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 164 | #define CONFIG_SYS_MAXARGS 32 /* max number of command */ |
| 165 | /* args */ |
| 166 | /* Boot Argument Buffer Size */ |
| 167 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 168 | /* memtest works on */ |
| 169 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) |
| 170 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
| 171 | 0x01F00000) /* 31MB */ |
| 172 | |
| 173 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ |
| 174 | /* address */ |
| 175 | |
| 176 | /* |
| 177 | * AM3517 has 12 GP timers, they can be driven by the system clock |
| 178 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 179 | * This rate is divided by a local divisor. |
| 180 | */ |
| 181 | #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 |
| 182 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 183 | #define CONFIG_SYS_HZ 1000 |
| 184 | |
| 185 | /* |
| 186 | * Stack sizes |
| 187 | * The stack sizes are set up in start.S using the settings below |
| 188 | */ |
| 189 | #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ |
| 190 | |
| 191 | /* |
| 192 | * Physical Memory Map |
| 193 | */ |
| 194 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
| 195 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 196 | #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ |
| 197 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
| 198 | |
| 199 | /* |
| 200 | * FLASH and environment organization |
| 201 | */ |
| 202 | |
| 203 | /* **** PISMO SUPPORT *** */ |
| 204 | |
| 205 | /* Configure the PISMO */ |
| 206 | #define PISMO1_NAND_SIZE GPMC_SIZE_128M |
| 207 | |
| 208 | #define CONFIG_NAND_OMAP_GPMC |
| 209 | #define GPMC_NAND_ECC_LP_x16_LAYOUT |
| 210 | #define CONFIG_ENV_IS_IN_NAND |
| 211 | #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ |
| 212 | |
| 213 | /* Redundant Environment */ |
| 214 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
| 215 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
| 216 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
| 217 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ |
| 218 | 2 * CONFIG_SYS_ENV_SECT_SIZE) |
| 219 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| 220 | |
| 221 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 222 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 223 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 224 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 225 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 226 | GENERATED_GBL_DATA_SIZE) |
| 227 | |
| 228 | /* |
| 229 | * ethernet support, EMAC |
| 230 | * |
| 231 | */ |
| 232 | #define CONFIG_DRIVER_TI_EMAC |
| 233 | #define CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 234 | #define CONFIG_MII |
| 235 | #define CONFIG_EMAC_MDIO_PHY_NUM 0 |
| 236 | #define CONFIG_BOOTP_DEFAULT |
| 237 | #define CONFIG_BOOTP_DNS |
| 238 | #define CONFIG_BOOTP_DNS2 |
| 239 | #define CONFIG_BOOTP_SEND_HOSTNAME |
| 240 | #define CONFIG_NET_RETRY_COUNT 10 |
| 241 | #define CONFIG_NET_MULTI |
| 242 | |
| 243 | /* Defines for SPL */ |
| 244 | #define CONFIG_SPL |
| 245 | #define CONFIG_SPL_CONSOLE |
| 246 | #define CONFIG_SPL_NAND_SIMPLE |
| 247 | #define CONFIG_SPL_NAND_SOFTECC |
| 248 | #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ |
| 249 | |
| 250 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 251 | #define CONFIG_SPL_LIBDISK_SUPPORT |
| 252 | #define CONFIG_SPL_I2C_SUPPORT |
| 253 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| 254 | #define CONFIG_SPL_SERIAL_SUPPORT |
| 255 | #define CONFIG_SPL_POWER_SUPPORT |
| 256 | #define CONFIG_SPL_NAND_SUPPORT |
| 257 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
| 258 | |
| 259 | #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ |
| 260 | #define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */ |
| 261 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
| 262 | |
| 263 | #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 |
| 264 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 265 | #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ |
| 266 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 267 | |
| 268 | /* NAND boot config */ |
| 269 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 270 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
| 271 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 272 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
| 273 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 274 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 |
| 275 | #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ |
| 276 | 48, 49, 50, 51, 52, 53, 54, 55,\ |
| 277 | 56, 57, 58, 59, 60, 61, 62, 63} |
| 278 | #define CONFIG_SYS_NAND_ECCSIZE 256 |
| 279 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
| 280 | |
| 281 | #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ |
| 282 | CONFIG_SYS_NAND_ECCSIZE) |
| 283 | #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ |
| 284 | CONFIG_SYS_NAND_ECCSTEPS) |
| 285 | |
| 286 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 287 | |
| 288 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 |
| 289 | #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 |
| 290 | |
| 291 | #define CONFIG_OF_LIBFDT |
| 292 | #define CONFIG_FIT |
| 293 | #define CONFIG_CMD_UBI |
| 294 | #define CONFIG_CMD_UBIFS |
| 295 | #define CONFIG_RBTREE |
| 296 | #define CONFIG_LZO |
| 297 | #define CONFIG_MTD_PARTITIONS |
| 298 | #define CONFIG_MTD_DEVICE |
| 299 | #define CONFIG_CMD_MTDPARTS |
| 300 | |
| 301 | /* Setup MTD for NAND on the SOM */ |
| 302 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" |
| 303 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ |
| 304 | "512k(u-boot),128k(env1)," \ |
| 305 | "128k(env2),6m(kernel),-(rootfs)" |
| 306 | |
| 307 | #define xstr(s) str(s) |
| 308 | #define str(s) #s |
| 309 | |
| 310 | #define CONFIG_TAM3517_SETTINGS \ |
| 311 | "netdev=eth0\0" \ |
| 312 | "nandargs=setenv bootargs root=${nandroot} " \ |
| 313 | "rootfstype=${nandrootfstype}\0" \ |
| 314 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 315 | "nfsroot=${serverip}:${rootpath}\0" \ |
| 316 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
| 317 | "addip_sta=setenv bootargs ${bootargs} " \ |
| 318 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 319 | ":${hostname}:${netdev}:off panic=1\0" \ |
| 320 | "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ |
| 321 | "addip=if test -n ${ipdyn};then run addip_dyn;" \ |
| 322 | "else run addip_sta;fi\0" \ |
| 323 | "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ |
| 324 | "addtty=setenv bootargs ${bootargs}" \ |
| 325 | " console=ttyO0,${baudrate}\0" \ |
| 326 | "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ |
| 327 | "loadaddr=82000000\0" \ |
| 328 | "kernel_addr_r=82000000\0" \ |
| 329 | "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ |
| 330 | "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ |
| 331 | "flash_self=run ramargs addip addtty addmtd addmisc;" \ |
| 332 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
| 333 | "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ |
| 334 | "bootm ${kernel_addr}\0" \ |
| 335 | "nandboot=run nandargs addip addtty addmtd addmisc;" \ |
| 336 | "nand read ${kernel_addr_r} kernel\0" \ |
| 337 | "bootm ${kernel_addr_r}\0" \ |
| 338 | "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ |
| 339 | "run nfsargs addip addtty addmtd addmisc;" \ |
| 340 | "bootm ${kernel_addr_r}\0" \ |
| 341 | "net_self=if run net_self_load;then " \ |
| 342 | "run ramargs addip addtty addmtd addmisc;" \ |
| 343 | "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ |
| 344 | "else echo Images not loades;fi\0" \ |
| 345 | "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \ |
| 346 | "load=tftp ${loadaddr} ${u-boot}\0" \ |
| 347 | "loadmlo=tftp ${loadaddr} ${mlo}\0" \ |
| 348 | "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \ |
| 349 | "uboot_addr=0x80000\0" \ |
| 350 | "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ |
| 351 | "nand write ${loadaddr} ${uboot_addr} 80000\0" \ |
| 352 | "updatemlo=nandecc hw;nand erase 0 20000;" \ |
| 353 | "nand write ${loadaddr} 0 20000\0" \ |
| 354 | "upd=if run load;then echo Updating u-boot;if run update;" \ |
| 355 | "then echo U-Boot updated;" \ |
| 356 | "else echo Error updating u-boot !;" \ |
| 357 | "echo Board without bootloader !!;" \ |
| 358 | "fi;" \ |
| 359 | "else echo U-Boot not downloaded..exiting;fi\0" \ |
| 360 | |
| 361 | #endif /* __TAM3517_H */ |