blob: 1b6c40f8d518ccbd167e0551f72e68f6e8817463 [file] [log] [blame]
Wolfgang Denk52568c32009-05-16 10:47:46 +02001/*
2 * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
3 * (C) Copyright 2009 Dave Srl www.dave.eu
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Denk52568c32009-05-16 10:47:46 +02006 */
7
8#include <common.h>
9#include <asm/bitops.h>
10#include <command.h>
11#include <asm/io.h>
12#include <asm/processor.h>
Wolfgang Denk7629f1c2009-06-14 20:58:47 +020013#include <asm/mpc512x.h>
Wolfgang Denk52568c32009-05-16 10:47:46 +020014#include <fdt_support.h>
15#ifdef CONFIG_MISC_INIT_R
16#include <i2c.h>
17#endif
18
19DECLARE_GLOBAL_DATA_PTR;
20
Wolfgang Denk52568c32009-05-16 10:47:46 +020021phys_size_t initdram (int board_type)
22{
Martha M Stan054197b2009-09-21 14:07:14 -040023 return fixed_sdram(NULL, NULL, 0);
Wolfgang Denk52568c32009-05-16 10:47:46 +020024}
25
Wolfgang Denk52568c32009-05-16 10:47:46 +020026int misc_init_r(void)
27{
28 u32 tmp;
29
30 /* we use I2C-2 for on-board eeprom */
31 i2c_set_bus_num(2);
32
33 tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE);
34 printf("FPGA: %u-%u.%u.%u\n",
35 (tmp & 0xFF000000) >> 24,
36 (tmp & 0x00FF0000) >> 16,
37 (tmp & 0x0000FF00) >> 8,
38 tmp & 0x000000FF
39 );
40
Wolfgang Denk52568c32009-05-16 10:47:46 +020041 return 0;
42}
43
44static iopin_t ioregs_init[] = {
45 /*
46 * FEC
47 */
48
49 /* FEC on PSCx_x*/
50 {
51 offsetof(struct ioctrl512x, io_control_psc0_0), 5, 0,
52 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
53 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
54 },
55 {
56 offsetof(struct ioctrl512x, io_control_psc1_0), 10, 0,
57 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
58 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
59 },
60 {
61 offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
62 IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
63 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
64 },
65
66 /*
67 * DIU
68 */
69 /* FUNC2=DIU CLK */
70 {
71 offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0,
72 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
73 IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
74 },
75 /* FUNC2=DIU_HSYNC */
76 {
77 offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0,
78 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
79 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
80 },
81 /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
82 {
83 offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0,
84 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
85 IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
86 },
87 /*
88 * On board SRAM
89 */
90 /* FUNC2=/LPC CS6 */
91 {
92 offsetof(struct ioctrl512x, io_control_j1850_rx), 1, 0,
93 IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
94 IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3)
95 },
96};
97
Wolfgang Denk52568c32009-05-16 10:47:46 +020098int checkboard (void)
99{
100 puts("Board: ARIA\n");
101
102 /* initialize function mux & slew rate IO inter alia on IO Pins */
103
104 iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
105
106 return 0;
107}
108
Robert P. J. Day7ffe3cd2016-05-19 15:23:12 -0400109#ifdef CONFIG_OF_BOARD_SETUP
Simon Glasse895a4b2014-10-23 18:58:47 -0600110int ft_board_setup(void *blob, bd_t *bd)
Wolfgang Denk52568c32009-05-16 10:47:46 +0200111{
112 ft_cpu_setup(blob, bd);
Simon Glasse895a4b2014-10-23 18:58:47 -0600113
114 return 0;
Wolfgang Denk52568c32009-05-16 10:47:46 +0200115}
Robert P. J. Day7ffe3cd2016-05-19 15:23:12 -0400116#endif /* CONFIG_OF_BOARD_SETUP */