Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / c960c0fd38be57abffb68996e53408ba5f675ee9 / . / configs / am62x_evm_a53_defconfig
blob: 832243a731268710f13067adaaef20cb6a415edb [file] [log] [blame]
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_K3=y
3CONFIG_SYS_MALLOC_F_LEN=0x8000
4CONFIG_SPL_LIBCOMMON_SUPPORT=y
5CONFIG_SPL_LIBGENERIC_SUPPORT=y
6CONFIG_NR_DRAM_BANKS=2
7CONFIG_SOC_K3_AM625=y
8CONFIG_K3_ATF_LOAD_ADDR=0x9e780000
9CONFIG_TARGET_AM625_A53_EVM=y
Tom Rinifcb51172023-02-17 09:58:06 -0500[diff] [blame]10CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
11CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
Tom Rinic960c0f2023-05-01 11:50:26 -0400[diff] [blame^]12CONFIG_SF_DEFAULT_SPEED=25000000
Sjoerd Simons21d39eb2022-12-20 16:21:44 +0100[diff] [blame]13CONFIG_SPL_DM_SPI=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]14CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk"
15CONFIG_SPL_TEXT_BASE=0x80080000
Tom Rinic960c0f2023-05-01 11:50:26 -0400[diff] [blame^]16CONFIG_OF_LIBFDT_OVERLAY=y
Tom Rinifcb51172023-02-17 09:58:06 -0500[diff] [blame]17CONFIG_DM_RESET=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]18CONFIG_SPL_MMC=y
19CONFIG_SPL_SERIAL=y
20CONFIG_SPL_STACK_R_ADDR=0x82000000
21CONFIG_SPL_FS_FAT=y
22CONFIG_SPL_LIBDISK_SUPPORT=y
Sjoerd Simons21d39eb2022-12-20 16:21:44 +0100[diff] [blame]23CONFIG_SPL_SPI_FLASH_SUPPORT=y
Dhruva Gole04150402022-10-27 20:23:11 +0530[diff] [blame]24CONFIG_SPL_SPI=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]25# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
26CONFIG_SPL_LOAD_FIT=y
27CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
Tom Rinic358af82023-03-27 13:39:17 -0400[diff] [blame]28CONFIG_DISTRO_DEFAULTS=y
Martyn Welch83f51952022-12-20 18:38:19 +0000[diff] [blame]29CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; setenv fdtfile ti/${name_fdt}; run distro_bootcmd"
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]30CONFIG_SPL_MAX_SIZE=0x58000
31CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
32CONFIG_SPL_BSS_START_ADDR=0x80a00000
33CONFIG_SPL_BSS_MAX_SIZE=0x80000
34CONFIG_SPL_SYS_MALLOC_SIMPLE=y
35CONFIG_SPL_STACK_R=y
36CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
37CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
38CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
39CONFIG_SPL_DM_MAILBOX=y
Dhruva Gole04150402022-10-27 20:23:11 +0530[diff] [blame]40CONFIG_SPL_DM_SPI_FLASH=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]41CONFIG_SPL_POWER_DOMAIN=y
Dhruva Gole04150402022-10-27 20:23:11 +0530[diff] [blame]42# CONFIG_SPL_SPI_FLASH_TINY is not set
43CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
Dhruva Gole04150402022-10-27 20:23:11 +0530[diff] [blame]44CONFIG_SPL_SPI_LOAD=y
45CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]46CONFIG_SPL_YMODEM_SUPPORT=y
Tom Rinic45568c2022-06-25 19:29:46 -0400[diff] [blame]47CONFIG_SYS_BOOTM_LEN=0x800000
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]48CONFIG_CMD_MMC=y
49CONFIG_OF_CONTROL=y
50CONFIG_SPL_OF_CONTROL=y
51CONFIG_MULTI_DTB_FIT=y
52CONFIG_SPL_MULTI_DTB_FIT=y
53CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
54CONFIG_NET_RANDOM_ETHADDR=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]55CONFIG_SPL_DM=y
56CONFIG_SPL_DM_SEQ_ALIAS=y
57CONFIG_REGMAP=y
58CONFIG_SPL_REGMAP=y
59CONFIG_SPL_OF_TRANSLATE=y
60CONFIG_CLK=y
61CONFIG_SPL_CLK=y
62CONFIG_CLK_TI_SCI=y
Sjoerd Simons92a15f62022-12-20 16:21:46 +0100[diff] [blame]63CONFIG_DMA_CHANNELS=y
64CONFIG_TI_K3_NAVSS_UDMA=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]65CONFIG_TI_SCI_PROTOCOL=y
66CONFIG_DM_MAILBOX=y
67CONFIG_K3_SEC_PROXY=y
68CONFIG_MMC_SDHCI=y
69CONFIG_MMC_SDHCI_ADMA=y
70CONFIG_SPL_MMC_SDHCI_ADMA=y
71CONFIG_MMC_SDHCI_AM654=y
Dhruva Gole04150402022-10-27 20:23:11 +0530[diff] [blame]72CONFIG_DM_SPI_FLASH=y
Dhruva Gole04150402022-10-27 20:23:11 +0530[diff] [blame]73CONFIG_SPI_FLASH_SFDP_SUPPORT=y
74CONFIG_SPI_FLASH_SOFT_RESET=y
75CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
76CONFIG_SPI_FLASH_SPANSION=y
Sjoerd Simonsa8ddc372022-12-20 16:21:43 +0100[diff] [blame]77CONFIG_SPI_FLASH_S28HX_T=y
Sjoerd Simons92a15f62022-12-20 16:21:46 +0100[diff] [blame]78CONFIG_PHY_TI_DP83867=y
79CONFIG_PHY_FIXED=y
80CONFIG_TI_AM65_CPSW_NUSS=y
81CONFIG_PHY=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]82CONFIG_PINCTRL=y
83CONFIG_SPL_PINCTRL=y
84CONFIG_PINCTRL_SINGLE=y
85CONFIG_POWER_DOMAIN=y
86CONFIG_TI_SCI_POWER_DOMAIN=y
87CONFIG_K3_SYSTEM_CONTROLLER=y
88CONFIG_REMOTEPROC_TI_K3_ARM64=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]89CONFIG_RESET_TI_SCI=y
90CONFIG_DM_SERIAL=y
91CONFIG_SOC_DEVICE=y
92CONFIG_SOC_DEVICE_TI_K3=y
93CONFIG_SOC_TI=y
Dhruva Gole04150402022-10-27 20:23:11 +0530[diff] [blame]94CONFIG_SPI=y
95CONFIG_DM_SPI=y
96CONFIG_CADENCE_QSPI=y
Vignesh Raghavendra2d257d92022-05-25 13:38:49 +0530[diff] [blame]97CONFIG_SYSRESET=y
98CONFIG_SPL_SYSRESET=y
99CONFIG_SYSRESET_TI_SCI=y
100CONFIG_FS_FAT_MAX_CLUSTSIZE=16384