blob: d2e41a026c4ddf5243af05bf50760a0e4124c4cf [file] [log] [blame]
Bo Shenc5e88852013-11-15 11:12:38 +08001/*
2 * (C) Copyright 2002
3 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 * Aneesh V <aneesh@ti.com>
8 *
9 * (C) 2013 Atmel Corporation
10 * Bo Shen <voice.shen@atmel.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
16 LENGTH = CONFIG_SPL_MAX_SIZE }
17MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
18 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
19
20OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
21OUTPUT_ARCH(arm)
22ENTRY(_start)
23SECTIONS
24{
25 .text :
26 {
27 __start = .;
Benoît Thébaudeaueeadd3f2014-08-21 15:43:11 +020028 *(.vectors)
Bo Shenc5e88852013-11-15 11:12:38 +080029 arch/arm/cpu/armv7/start.o (.text*)
30 *(.text*)
31 } >.sram
32
33 . = ALIGN(4);
34 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
35
36 . = ALIGN(4);
37 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
38
39 . = ALIGN(4);
Tom Rinif8a48262016-03-15 17:56:29 -040040 .u_boot_list : { KEEP(*(SORT(.u_boot_list*))) } > .sram
41
42 . = ALIGN(4);
Bo Shenc5e88852013-11-15 11:12:38 +080043 __image_copy_end = .;
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +010044
45 .end :
46 {
47 *(.__end)
48 } >.sram
Bo Shenc5e88852013-11-15 11:12:38 +080049
Wenyou Yang7abd5aa2017-03-24 11:34:06 +080050 _image_binary_end = .;
51
Bo Shenc5e88852013-11-15 11:12:38 +080052 .bss :
53 {
54 . = ALIGN(4);
55 __bss_start = .;
56 *(.bss*)
57 . = ALIGN(4);
58 __bss_end = .;
59 } >.sdram
60}