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wdenk38635852002-08-27 05:55:31 +00001/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
d4f5c722005-08-12 21:16:13 +020025/*
26 * Support for read and write access to EEPROM like memory devices. This
27 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
28 * FRAM devices read and write data at bus speed. In particular, there is no
Peter Meerwalde506a002012-02-08 05:31:53 +000029 * write delay. Also, there is no limit imposed on the number of bytes that can
d4f5c722005-08-12 21:16:13 +020030 * be transferred with a single read or write.
Wolfgang Denk6617aae2005-08-19 00:46:54 +020031 *
d4f5c722005-08-12 21:16:13 +020032 * Use the following configuration options to ensure no unneeded performance
33 * degradation (typical for EEPROM) is incured for FRAM memory:
Wolfgang Denk6617aae2005-08-19 00:46:54 +020034 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020035 * #define CONFIG_SYS_I2C_FRAM
36 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
d4f5c722005-08-12 21:16:13 +020037 *
38 */
39
wdenk38635852002-08-27 05:55:31 +000040#include <common.h>
41#include <config.h>
42#include <command.h>
43#include <i2c.h>
44
wdenk38635852002-08-27 05:55:31 +000045extern void eeprom_init (void);
46extern int eeprom_read (unsigned dev_addr, unsigned offset,
47 uchar *buffer, unsigned cnt);
48extern int eeprom_write (unsigned dev_addr, unsigned offset,
49 uchar *buffer, unsigned cnt);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#if defined(CONFIG_SYS_EEPROM_WREN)
Stefan Roese98f4a3d2005-09-22 09:04:17 +020051extern int eeprom_write_enable (unsigned dev_addr, int state);
52#endif
wdenk38635852002-08-27 05:55:31 +000053
54
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055#if defined(CONFIG_SYS_EEPROM_X40430)
wdenk38635852002-08-27 05:55:31 +000056 /* Maximum number of times to poll for acknowledge after write */
57#define MAX_ACKNOWLEDGE_POLLS 10
58#endif
59
60/* ------------------------------------------------------------------------- */
61
Jon Loeligerbaa26db2007-07-08 17:51:39 -050062#if defined(CONFIG_CMD_EEPROM)
Wolfgang Denk54841ab2010-06-28 22:00:46 +020063int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000064{
65 const char *const fmt =
66 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
67
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
wdenk38635852002-08-27 05:55:31 +000069 if (argc == 6) {
70 ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
71 ulong addr = simple_strtoul (argv[3], NULL, 16);
72 ulong off = simple_strtoul (argv[4], NULL, 16);
73 ulong cnt = simple_strtoul (argv[5], NULL, 16);
74#else
75 if (argc == 5) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076 ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
wdenk38635852002-08-27 05:55:31 +000077 ulong addr = simple_strtoul (argv[2], NULL, 16);
78 ulong off = simple_strtoul (argv[3], NULL, 16);
79 ulong cnt = simple_strtoul (argv[4], NULL, 16);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
wdenk38635852002-08-27 05:55:31 +000081
Heiko Schocher548738b2010-01-07 08:55:40 +010082# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +000083 eeprom_init ();
84# endif /* !CONFIG_SPI */
85
86 if (strcmp (argv[1], "read") == 0) {
87 int rcode;
88
89 printf (fmt, dev_addr, argv[1], addr, off, cnt);
90
91 rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
92
wdenk4b9206e2004-03-23 22:14:11 +000093 puts ("done\n");
wdenk38635852002-08-27 05:55:31 +000094 return rcode;
95 } else if (strcmp (argv[1], "write") == 0) {
96 int rcode;
97
98 printf (fmt, dev_addr, argv[1], addr, off, cnt);
99
100 rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
101
wdenk4b9206e2004-03-23 22:14:11 +0000102 puts ("done\n");
wdenk38635852002-08-27 05:55:31 +0000103 return rcode;
104 }
105 }
106
Simon Glass4c12eeb2011-12-10 08:44:01 +0000107 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +0000108}
Jon Loeliger90253172007-07-10 11:02:44 -0500109#endif
wdenk38635852002-08-27 05:55:31 +0000110
111/*-----------------------------------------------------------------------
112 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
wdenk38635852002-08-27 05:55:31 +0000114 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
115 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
wdenk38635852002-08-27 05:55:31 +0000117 * 0x00000nxx for EEPROM address selectors and page number at n.
118 */
119
Heiko Schocher548738b2010-01-07 08:55:40 +0100120#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
122#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
wdenk38635852002-08-27 05:55:31 +0000123#endif
124#endif
125
126int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
127{
128 unsigned end = offset + cnt;
129 unsigned blk_off;
130 int rcode = 0;
131
132 /* Read data until done or would cross a page boundary.
133 * We must write the address again when changing pages
134 * because the next page may be in a different device.
135 */
136 while (offset < end) {
d4f5c722005-08-12 21:16:13 +0200137 unsigned alen, len;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c722005-08-12 21:16:13 +0200139 unsigned maxlen;
140#endif
141
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
wdenk38635852002-08-27 05:55:31 +0000143 uchar addr[2];
144
145 blk_off = offset & 0xFF; /* block offset */
146
147 addr[0] = offset >> 8; /* block number */
148 addr[1] = blk_off; /* block offset */
149 alen = 2;
150#else
151 uchar addr[3];
152
153 blk_off = offset & 0xFF; /* block offset */
154
155 addr[0] = offset >> 16; /* block number */
156 addr[1] = offset >> 8; /* upper address octet */
157 addr[2] = blk_off; /* lower address octet */
158 alen = 3;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
wdenk38635852002-08-27 05:55:31 +0000160
161 addr[0] |= dev_addr; /* insert device address */
162
d4f5c722005-08-12 21:16:13 +0200163 len = end - offset;
164
165 /*
166 * For a FRAM device there is no limit on the number of the
167 * bytes that can be ccessed with the single read or write
168 * operation.
169 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#if !defined(CONFIG_SYS_I2C_FRAM)
wdenk38635852002-08-27 05:55:31 +0000171 maxlen = 0x100 - blk_off;
172 if (maxlen > I2C_RXTX_LEN)
173 maxlen = I2C_RXTX_LEN;
wdenk38635852002-08-27 05:55:31 +0000174 if (len > maxlen)
175 len = maxlen;
d4f5c722005-08-12 21:16:13 +0200176#endif
177
Heiko Schocher548738b2010-01-07 08:55:40 +0100178#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +0000179 spi_read (addr, alen, buffer, len);
180#else
181 if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
182 rcode = 1;
183#endif
184 buffer += len;
185 offset += len;
186 }
d4f5c722005-08-12 21:16:13 +0200187
wdenk38635852002-08-27 05:55:31 +0000188 return rcode;
189}
190
191/*-----------------------------------------------------------------------
192 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
wdenk38635852002-08-27 05:55:31 +0000194 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
195 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
wdenk38635852002-08-27 05:55:31 +0000197 * 0x00000nxx for EEPROM address selectors and page number at n.
198 */
199
200int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
201{
202 unsigned end = offset + cnt;
203 unsigned blk_off;
204 int rcode = 0;
205
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#if defined(CONFIG_SYS_EEPROM_X40430)
wdenk38635852002-08-27 05:55:31 +0000207 uchar contr_r_addr[2];
208 uchar addr_void[2];
209 uchar contr_reg[2];
210 uchar ctrl_reg_v;
211 int i;
212#endif
213
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#if defined(CONFIG_SYS_EEPROM_WREN)
Stefan Roese98f4a3d2005-09-22 09:04:17 +0200215 eeprom_write_enable (dev_addr,1);
216#endif
wdenk38635852002-08-27 05:55:31 +0000217 /* Write data until done or would cross a write page boundary.
218 * We must write the address again when changing pages
219 * because the address counter only increments within a page.
220 */
221
222 while (offset < end) {
d4f5c722005-08-12 21:16:13 +0200223 unsigned alen, len;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200224#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c722005-08-12 21:16:13 +0200225 unsigned maxlen;
226#endif
227
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
wdenk38635852002-08-27 05:55:31 +0000229 uchar addr[2];
230
231 blk_off = offset & 0xFF; /* block offset */
232
233 addr[0] = offset >> 8; /* block number */
234 addr[1] = blk_off; /* block offset */
235 alen = 2;
236#else
237 uchar addr[3];
238
239 blk_off = offset & 0xFF; /* block offset */
240
241 addr[0] = offset >> 16; /* block number */
242 addr[1] = offset >> 8; /* upper address octet */
243 addr[2] = blk_off; /* lower address octet */
244 alen = 3;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200245#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
wdenk38635852002-08-27 05:55:31 +0000246
247 addr[0] |= dev_addr; /* insert device address */
248
d4f5c722005-08-12 21:16:13 +0200249 len = end - offset;
250
251 /*
252 * For a FRAM device there is no limit on the number of the
Michael Jonesf9a78b82011-07-14 22:09:28 +0000253 * bytes that can be accessed with the single read or write
d4f5c722005-08-12 21:16:13 +0200254 * operation.
255 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200256#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c722005-08-12 21:16:13 +0200257
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
wdenk38635852002-08-27 05:55:31 +0000259
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200260#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
wdenk38635852002-08-27 05:55:31 +0000261#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
262
263 maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
264#else
265 maxlen = 0x100 - blk_off;
266#endif
267 if (maxlen > I2C_RXTX_LEN)
268 maxlen = I2C_RXTX_LEN;
269
wdenk38635852002-08-27 05:55:31 +0000270 if (len > maxlen)
271 len = maxlen;
d4f5c722005-08-12 21:16:13 +0200272#endif
273
Heiko Schocher548738b2010-01-07 08:55:40 +0100274#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +0000275 spi_write (addr, alen, buffer, len);
276#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200277#if defined(CONFIG_SYS_EEPROM_X40430)
wdenk38635852002-08-27 05:55:31 +0000278 /* Get the value of the control register.
279 * Set current address (internal pointer in the x40430)
280 * to 0x1ff.
281 */
282 contr_r_addr[0] = 9;
283 contr_r_addr[1] = 0xff;
284 addr_void[0] = 0;
285 addr_void[1] = addr[1];
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
287 contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
288 addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
wdenk38635852002-08-27 05:55:31 +0000289#endif
290 contr_reg[0] = 0xff;
291 if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
292 rcode = 1;
293 }
294 ctrl_reg_v = contr_reg[0];
295
296 /* Are any of the eeprom blocks write protected?
297 */
298 if (ctrl_reg_v & 0x18) {
299 ctrl_reg_v &= ~0x18; /* reset block protect bits */
300 ctrl_reg_v |= 0x02; /* set write enable latch */
301 ctrl_reg_v &= ~0x04; /* clear RWEL */
302
303 /* Set write enable latch.
304 */
305 contr_reg[0] = 0x02;
306 if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
307 rcode = 1;
308 }
309
310 /* Set register write enable latch.
311 */
312 contr_reg[0] = 0x06;
313 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
314 rcode = 1;
315 }
316
317 /* Modify ctrl register.
318 */
319 contr_reg[0] = ctrl_reg_v;
320 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
321 rcode = 1;
322 }
323
324 /* The write (above) is an operation on NV memory.
325 * These can take some time (~5ms), and the device
326 * will not respond to further I2C messages till
327 * it's completed the write.
328 * So poll device for an I2C acknowledge.
329 * When we get one we know we can continue with other
330 * operations.
331 */
332 contr_reg[0] = 0;
333 for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
wdenkaacf9a42003-01-17 16:27:01 +0000334 if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
wdenk38635852002-08-27 05:55:31 +0000335 break; /* got ack */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200336#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
337 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
wdenk38635852002-08-27 05:55:31 +0000338#endif
339 }
340 if (i == MAX_ACKNOWLEDGE_POLLS) {
wdenk4b9206e2004-03-23 22:14:11 +0000341 puts ("EEPROM poll acknowledge failed\n");
wdenk38635852002-08-27 05:55:31 +0000342 rcode = 1;
343 }
344 }
345
346 /* Is the write enable latch on?.
347 */
348 else if (!(ctrl_reg_v & 0x02)) {
349 /* Set write enable latch.
350 */
351 contr_reg[0] = 0x02;
352 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
353 rcode = 1;
354 }
355 }
356 /* Write is enabled ... now write eeprom value.
357 */
358#endif
359 if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
360 rcode = 1;
361
362#endif
363 buffer += len;
364 offset += len;
365
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200366#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
367 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
wdenk38635852002-08-27 05:55:31 +0000368#endif
369 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200370#if defined(CONFIG_SYS_EEPROM_WREN)
Stefan Roese98f4a3d2005-09-22 09:04:17 +0200371 eeprom_write_enable (dev_addr,0);
372#endif
wdenk38635852002-08-27 05:55:31 +0000373 return rcode;
374}
375
Heiko Schocher548738b2010-01-07 08:55:40 +0100376#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk6dd652f2003-06-19 23:40:20 +0000377int
378eeprom_probe (unsigned dev_addr, unsigned offset)
379{
380 unsigned char chip;
381
382 /* Probe the chip address
383 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200384#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
wdenk6dd652f2003-06-19 23:40:20 +0000385 chip = offset >> 8; /* block number */
386#else
387 chip = offset >> 16; /* block number */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200388#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
wdenk6dd652f2003-06-19 23:40:20 +0000389
390 chip |= dev_addr; /* insert device address */
391
392 return (i2c_probe (chip));
393}
394#endif
395
wdenk38635852002-08-27 05:55:31 +0000396/*-----------------------------------------------------------------------
397 * Set default values
398 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200399#ifndef CONFIG_SYS_I2C_SPEED
400#define CONFIG_SYS_I2C_SPEED 50000
wdenk38635852002-08-27 05:55:31 +0000401#endif
402
wdenk38635852002-08-27 05:55:31 +0000403void eeprom_init (void)
404{
Heiko Schocher548738b2010-01-07 08:55:40 +0100405
406#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +0000407 spi_init_f ();
408#endif
409#if defined(CONFIG_HARD_I2C) || \
410 defined(CONFIG_SOFT_I2C)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200411 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
wdenk38635852002-08-27 05:55:31 +0000412#endif
413}
Heiko Schocher548738b2010-01-07 08:55:40 +0100414
wdenk38635852002-08-27 05:55:31 +0000415/*-----------------------------------------------------------------------
416 */
Jon Loeliger90253172007-07-10 11:02:44 -0500417
wdenk8bde7f72003-06-27 21:31:46 +0000418/***************************************************/
419
Jon Loeligerbaa26db2007-07-08 17:51:39 -0500420#if defined(CONFIG_CMD_EEPROM)
wdenk8bde7f72003-06-27 21:31:46 +0000421
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200422#ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
wdenk0d498392003-07-01 21:06:45 +0000423U_BOOT_CMD(
424 eeprom, 6, 1, do_eeprom,
Peter Tyser2fb26042009-01-27 18:03:12 -0600425 "EEPROM sub-system",
wdenk8bde7f72003-06-27 21:31:46 +0000426 "read devaddr addr off cnt\n"
427 "eeprom write devaddr addr off cnt\n"
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200428 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
wdenk8bde7f72003-06-27 21:31:46 +0000429);
430#else /* One EEPROM */
wdenk0d498392003-07-01 21:06:45 +0000431U_BOOT_CMD(
432 eeprom, 5, 1, do_eeprom,
Peter Tyser2fb26042009-01-27 18:03:12 -0600433 "EEPROM sub-system",
wdenk8bde7f72003-06-27 21:31:46 +0000434 "read addr off cnt\n"
435 "eeprom write addr off cnt\n"
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200436 " - read/write `cnt' bytes at EEPROM offset `off'"
wdenk8bde7f72003-06-27 21:31:46 +0000437);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200438#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
wdenk8bde7f72003-06-27 21:31:46 +0000439
Jon Loeliger90253172007-07-10 11:02:44 -0500440#endif