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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / ca9131c0569a98b6538c5a2d78c3d845bdf54bae / . / drivers / block / sata_dwc.h
blob: e4e4ab112261d093e00e2962559807970a7a6fce [file] [log] [blame]
Kazuaki Ichinohee405afa2009-06-12 18:10:12 +0900[diff] [blame]1/*
2 * sata_dwc.h
3 *
4 * Synopsys DesignWare Cores (DWC) SATA host driver
5 *
6 * Author: Mark Miesfeld <mmiesfeld@amcc.com>
7 *
8 * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr@denx.de>
9 * Copyright 2008 DENX Software Engineering
10 *
11 * Based on versions provided by AMCC and Synopsys which are:
12 * Copyright 2006 Applied Micro Circuits Corporation
13 * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
14 *
15 * This program is free software; you can redistribute
16 * it and/or modify it under the terms of the GNU
17 * General Public License as published by the
18 * Free Software Foundation; either version 2 of the License,
19 * or (at your option) any later version.
20 *
21 */
22/*
23 * SATA support based on the chip canyonlands.
24 *
25 * 04-17-2009
26 * The local version of this driver for the canyonlands board
27 * does not use interrupts but polls the chip instead.
28 */
29
30
31#ifndef _SATA_DWC_H_
32#define _SATA_DWC_H_
33
34#define __U_BOOT__
35
36#define HZ 100
37#define READ 0
38#define WRITE 1
39
40enum {
41 ATA_READID_POSTRESET = (1 << 0),
42
43 ATA_DNXFER_PIO = 0,
44 ATA_DNXFER_DMA = 1,
45 ATA_DNXFER_40C = 2,
46 ATA_DNXFER_FORCE_PIO = 3,
47 ATA_DNXFER_FORCE_PIO0 = 4,
48
49 ATA_DNXFER_QUIET = (1 << 31),
50};
51
52enum hsm_task_states {
53 HSM_ST_IDLE,
54 HSM_ST_FIRST,
55 HSM_ST,
56 HSM_ST_LAST,
57 HSM_ST_ERR,
58};
59
60#define ATA_SHORT_PAUSE ((HZ >> 6) + 1)
61
62struct ata_queued_cmd {
63 struct ata_port *ap;
64 struct ata_device *dev;
65
66 struct ata_taskfile tf;
67 u8 cdb[ATAPI_CDB_LEN];
68 unsigned long flags;
69 unsigned int tag;
70 unsigned int n_elem;
71
72 int dma_dir;
73 unsigned int sect_size;
74
75 unsigned int nbytes;
76 unsigned int extrabytes;
77 unsigned int curbytes;
78
79 unsigned int err_mask;
80 struct ata_taskfile result_tf;
81
82 void *private_data;
83#ifndef __U_BOOT__
84 void *lldd_task;
85#endif
86 unsigned char *pdata;
87};
88
89typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
90
91#define ATA_TAG_POISON 0xfafbfcfdU
92
93enum {
94 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
95 LIBATA_DUMB_MAX_PRD = ATA_MAX_PRD / 4,
96 ATA_MAX_PORTS = 8,
97 ATA_DEF_QUEUE = 1,
98 ATA_MAX_QUEUE = 32,
99 ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1,
100 ATA_MAX_BUS = 2,
101 ATA_DEF_BUSY_WAIT = 10000,
102
103 ATAPI_MAX_DRAIN = 16 << 10,
104
105 ATA_SHT_EMULATED = 1,
106 ATA_SHT_CMD_PER_LUN = 1,
107 ATA_SHT_THIS_ID = -1,
108 ATA_SHT_USE_CLUSTERING = 1,
109
110 ATA_DFLAG_LBA = (1 << 0),
111 ATA_DFLAG_LBA48 = (1 << 1),
112 ATA_DFLAG_CDB_INTR = (1 << 2),
113 ATA_DFLAG_NCQ = (1 << 3),
114 ATA_DFLAG_FLUSH_EXT = (1 << 4),
115 ATA_DFLAG_ACPI_PENDING = (1 << 5),
116 ATA_DFLAG_ACPI_FAILED = (1 << 6),
117 ATA_DFLAG_AN = (1 << 7),
118 ATA_DFLAG_HIPM = (1 << 8),
119 ATA_DFLAG_DIPM = (1 << 9),
120 ATA_DFLAG_DMADIR = (1 << 10),
121 ATA_DFLAG_CFG_MASK = (1 << 12) - 1,
122
123 ATA_DFLAG_PIO = (1 << 12),
124 ATA_DFLAG_NCQ_OFF = (1 << 13),
125 ATA_DFLAG_SPUNDOWN = (1 << 14),
126 ATA_DFLAG_SLEEPING = (1 << 15),
127 ATA_DFLAG_DUBIOUS_XFER = (1 << 16),
128 ATA_DFLAG_INIT_MASK = (1 << 24) - 1,
129
130 ATA_DFLAG_DETACH = (1 << 24),
131 ATA_DFLAG_DETACHED = (1 << 25),
132
133 ATA_LFLAG_HRST_TO_RESUME = (1 << 0),
134 ATA_LFLAG_SKIP_D2H_BSY = (1 << 1),
135 ATA_LFLAG_NO_SRST = (1 << 2),
136 ATA_LFLAG_ASSUME_ATA = (1 << 3),
137 ATA_LFLAG_ASSUME_SEMB = (1 << 4),
138 ATA_LFLAG_ASSUME_CLASS = ATA_LFLAG_ASSUME_ATA | ATA_LFLAG_ASSUME_SEMB,
139 ATA_LFLAG_NO_RETRY = (1 << 5),
140 ATA_LFLAG_DISABLED = (1 << 6),
141
142 ATA_FLAG_SLAVE_POSS = (1 << 0),
143 ATA_FLAG_SATA = (1 << 1),
144 ATA_FLAG_NO_LEGACY = (1 << 2),
145 ATA_FLAG_MMIO = (1 << 3),
146 ATA_FLAG_SRST = (1 << 4),
147 ATA_FLAG_SATA_RESET = (1 << 5),
148 ATA_FLAG_NO_ATAPI = (1 << 6),
149 ATA_FLAG_PIO_DMA = (1 << 7),
150 ATA_FLAG_PIO_LBA48 = (1 << 8),
151 ATA_FLAG_PIO_POLLING = (1 << 9),
152 ATA_FLAG_NCQ = (1 << 10),
153 ATA_FLAG_DEBUGMSG = (1 << 13),
154 ATA_FLAG_IGN_SIMPLEX = (1 << 15),
155 ATA_FLAG_NO_IORDY = (1 << 16),
156 ATA_FLAG_ACPI_SATA = (1 << 17),
157 ATA_FLAG_AN = (1 << 18),
158 ATA_FLAG_PMP = (1 << 19),
159 ATA_FLAG_IPM = (1 << 20),
160
161 ATA_FLAG_DISABLED = (1 << 23),
162
163 ATA_PFLAG_EH_PENDING = (1 << 0),
164 ATA_PFLAG_EH_IN_PROGRESS = (1 << 1),
165 ATA_PFLAG_FROZEN = (1 << 2),
166 ATA_PFLAG_RECOVERED = (1 << 3),
167 ATA_PFLAG_LOADING = (1 << 4),
168 ATA_PFLAG_UNLOADING = (1 << 5),
169 ATA_PFLAG_SCSI_HOTPLUG = (1 << 6),
170 ATA_PFLAG_INITIALIZING = (1 << 7),
171 ATA_PFLAG_RESETTING = (1 << 8),
172 ATA_PFLAG_SUSPENDED = (1 << 17),
173 ATA_PFLAG_PM_PENDING = (1 << 18),
174
175 ATA_QCFLAG_ACTIVE = (1 << 0),
176 ATA_QCFLAG_DMAMAP = (1 << 1),
177 ATA_QCFLAG_IO = (1 << 3),
178 ATA_QCFLAG_RESULT_TF = (1 << 4),
179 ATA_QCFLAG_CLEAR_EXCL = (1 << 5),
180 ATA_QCFLAG_QUIET = (1 << 6),
181
182 ATA_QCFLAG_FAILED = (1 << 16),
183 ATA_QCFLAG_SENSE_VALID = (1 << 17),
184 ATA_QCFLAG_EH_SCHEDULED = (1 << 18),
185
186 ATA_HOST_SIMPLEX = (1 << 0),
187 ATA_HOST_STARTED = (1 << 1),
188
189 ATA_TMOUT_BOOT = 30 * 100,
190 ATA_TMOUT_BOOT_QUICK = 7 * 100,
191 ATA_TMOUT_INTERNAL = 30 * 100,
192 ATA_TMOUT_INTERNAL_QUICK = 5 * 100,
193
194 /* FIXME: GoVault needs 2s but we can't afford that without
195 * parallel probing. 800ms is enough for iVDR disk
196 * HHD424020F7SV00. Increase to 2secs when parallel probing
197 * is in place.
198 */
199 ATA_TMOUT_FF_WAIT = 4 * 100 / 5,
200
201 BUS_UNKNOWN = 0,
202 BUS_DMA = 1,
203 BUS_IDLE = 2,
204 BUS_NOINTR = 3,
205 BUS_NODATA = 4,
206 BUS_TIMER = 5,
207 BUS_PIO = 6,
208 BUS_EDD = 7,
209 BUS_IDENTIFY = 8,
210 BUS_PACKET = 9,
211
212 PORT_UNKNOWN = 0,
213 PORT_ENABLED = 1,
214 PORT_DISABLED = 2,
215
216 /* encoding various smaller bitmaps into a single
217 * unsigned long bitmap
218 */
219 ATA_NR_PIO_MODES = 7,
220 ATA_NR_MWDMA_MODES = 5,
221 ATA_NR_UDMA_MODES = 8,
222
223 ATA_SHIFT_PIO = 0,
224 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_NR_PIO_MODES,
225 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES,
226
227 ATA_DMA_PAD_SZ = 4,
228
229 ATA_ERING_SIZE = 32,
230
231 ATA_DEFER_LINK = 1,
232 ATA_DEFER_PORT = 2,
233
234 ATA_EH_DESC_LEN = 80,
235
236 ATA_EH_REVALIDATE = (1 << 0),
237 ATA_EH_SOFTRESET = (1 << 1),
238 ATA_EH_HARDRESET = (1 << 2),
239 ATA_EH_ENABLE_LINK = (1 << 3),
240 ATA_EH_LPM = (1 << 4),
241
242 ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
243 ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE,
244
245 ATA_EHI_HOTPLUGGED = (1 << 0),
246 ATA_EHI_RESUME_LINK = (1 << 1),
247 ATA_EHI_NO_AUTOPSY = (1 << 2),
248 ATA_EHI_QUIET = (1 << 3),
249
250 ATA_EHI_DID_SOFTRESET = (1 << 16),
251 ATA_EHI_DID_HARDRESET = (1 << 17),
252 ATA_EHI_PRINTINFO = (1 << 18),
253 ATA_EHI_SETMODE = (1 << 19),
254 ATA_EHI_POST_SETMODE = (1 << 20),
255
256 ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
257 ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
258
259 ATA_EH_MAX_TRIES = 5,
260
261 ATA_PROBE_MAX_TRIES = 3,
262 ATA_EH_DEV_TRIES = 3,
263 ATA_EH_PMP_TRIES = 5,
264 ATA_EH_PMP_LINK_TRIES = 3,
265
266 SATA_PMP_SCR_TIMEOUT = 250,
267
268 /* Horkage types. May be set by libata or controller on drives
269 (some horkage may be drive/controller pair dependant */
270
271 ATA_HORKAGE_DIAGNOSTIC = (1 << 0),
272 ATA_HORKAGE_NODMA = (1 << 1),
273 ATA_HORKAGE_NONCQ = (1 << 2),
274 ATA_HORKAGE_MAX_SEC_128 = (1 << 3),
275 ATA_HORKAGE_BROKEN_HPA = (1 << 4),
276 ATA_HORKAGE_SKIP_PM = (1 << 5),
277 ATA_HORKAGE_HPA_SIZE = (1 << 6),
278 ATA_HORKAGE_IPM = (1 << 7),
279 ATA_HORKAGE_IVB = (1 << 8),
280 ATA_HORKAGE_STUCK_ERR = (1 << 9),
281
282 ATA_DMA_MASK_ATA = (1 << 0),
283 ATA_DMA_MASK_ATAPI = (1 << 1),
284 ATA_DMA_MASK_CFA = (1 << 2),
285
286 ATAPI_READ = 0,
287 ATAPI_WRITE = 1,
288 ATAPI_READ_CD = 2,
289 ATAPI_PASS_THRU = 3,
290 ATAPI_MISC = 4,
291};
292
293enum ata_completion_errors {
294 AC_ERR_DEV = (1 << 0),
295 AC_ERR_HSM = (1 << 1),
296 AC_ERR_TIMEOUT = (1 << 2),
297 AC_ERR_MEDIA = (1 << 3),
298 AC_ERR_ATA_BUS = (1 << 4),
299 AC_ERR_HOST_BUS = (1 << 5),
300 AC_ERR_SYSTEM = (1 << 6),
301 AC_ERR_INVALID = (1 << 7),
302 AC_ERR_OTHER = (1 << 8),
303 AC_ERR_NODEV_HINT = (1 << 9),
304 AC_ERR_NCQ = (1 << 10),
305};
306
307enum ata_xfer_mask {
308 ATA_MASK_PIO = ((1LU << ATA_NR_PIO_MODES) - 1) << ATA_SHIFT_PIO,
309 ATA_MASK_MWDMA = ((1LU << ATA_NR_MWDMA_MODES) - 1) << ATA_SHIFT_MWDMA,
310 ATA_MASK_UDMA = ((1LU << ATA_NR_UDMA_MODES) - 1) << ATA_SHIFT_UDMA,
311};
312
313struct ata_port_info {
314#ifndef __U_BOOT__
315 struct scsi_host_template *sht;
316#endif
317 unsigned long flags;
318 unsigned long link_flags;
319 unsigned long pio_mask;
320 unsigned long mwdma_mask;
321 unsigned long udma_mask;
322#ifndef __U_BOOT__
323 const struct ata_port_operations *port_ops;
324 void *private_data;
325#endif
326};
327
328struct ata_ioports {
329 void __iomem *cmd_addr;
330 void __iomem *data_addr;
331 void __iomem *error_addr;
332 void __iomem *feature_addr;
333 void __iomem *nsect_addr;
334 void __iomem *lbal_addr;
335 void __iomem *lbam_addr;
336 void __iomem *lbah_addr;
337 void __iomem *device_addr;
338 void __iomem *status_addr;
339 void __iomem *command_addr;
340 void __iomem *altstatus_addr;
341 void __iomem *ctl_addr;
342#ifndef __U_BOOT__
343 void __iomem *bmdma_addr;
344#endif
345 void __iomem *scr_addr;
346};
347
348struct ata_host {
349#ifndef __U_BOOT__
350 void __iomem * const *iomap;
351 void *private_data;
352 const struct ata_port_operations *ops;
353 unsigned long flags;
354 struct ata_port *simplex_claimed;
355#endif
356 unsigned int n_ports;
357 struct ata_port *ports[0];
358};
359
360#ifndef __U_BOOT__
361struct ata_port_stats {
362 unsigned long unhandled_irq;
363 unsigned long idle_irq;
364 unsigned long rw_reqbuf;
365};
366#endif
367
368struct ata_device {
369 struct ata_link *link;
370 unsigned int devno;
371 unsigned long flags;
372 unsigned int horkage;
373#ifndef __U_BOOT__
374 struct scsi_device *sdev;
375#ifdef CONFIG_ATA_ACPI
376 acpi_handle acpi_handle;
377 union acpi_object *gtf_cache;
378#endif
379#endif
380 u64 n_sectors;
381 unsigned int class;
382
383 union {
384 u16 id[ATA_ID_WORDS];
385 u32 gscr[SATA_PMP_GSCR_DWORDS];
386 };
387#ifndef __U_BOOT__
388 u8 pio_mode;
389 u8 dma_mode;
390 u8 xfer_mode;
391 unsigned int xfer_shift;
392#endif
393 unsigned int multi_count;
394 unsigned int max_sectors;
395 unsigned int cdb_len;
396#ifndef __U_BOOT__
397 unsigned long pio_mask;
398 unsigned long mwdma_mask;
399#endif
400 unsigned long udma_mask;
401 u16 cylinders;
402 u16 heads;
403 u16 sectors;
404#ifndef __U_BOOT__
405 int spdn_cnt;
406#endif
407};
408
409enum dma_data_direction {
410 DMA_BIDIRECTIONAL = 0,
411 DMA_TO_DEVICE = 1,
412 DMA_FROM_DEVICE = 2,
413 DMA_NONE = 3,
414};
415
416struct ata_link {
417 struct ata_port *ap;
418 int pmp;
419 unsigned int active_tag;
420 u32 sactive;
421 unsigned int flags;
422 unsigned int hw_sata_spd_limit;
423#ifndef __U_BOOT__
424 unsigned int sata_spd_limit;
425 unsigned int sata_spd;
426 struct ata_device device[2];
427#endif
428};
429
430struct ata_port {
431 unsigned long flags;
432 unsigned int pflags;
433 unsigned int print_id;
434 unsigned int port_no;
435
436 struct ata_ioports ioaddr;
437
438 u8 ctl;
439 u8 last_ctl;
440 unsigned int pio_mask;
441 unsigned int mwdma_mask;
442 unsigned int udma_mask;
443 unsigned int cbl;
444
445 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
446 unsigned long qc_allocated;
447 unsigned int qc_active;
448 int nr_active_links;
449
450 struct ata_link link;
451#ifndef __U_BOOT__
452 int nr_pmp_links;
453 struct ata_link *pmp_link;
454#endif
455 struct ata_link *excl_link;
456 int nr_pmp_links;
457#ifndef __U_BOOT__
458 struct ata_port_stats stats;
459 struct device *dev;
460 u32 msg_enable;
461#endif
462 struct ata_host *host;
463 void *port_task_data;
464
465 unsigned int hsm_task_state;
466 void *private_data;
467 unsigned char *pdata;
468};
469
Kazuaki Ichinohee405afa2009-06-12 18:10:12 +0900[diff] [blame]470#endif