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wdenk4e5ca3e2003-12-08 01:34:36 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26#define PHYS_FLASH_1 CFG_FLASH_BASE
27#define FLASH_BANK_SIZE 0x200000
28
29flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
30
31void flash_print_info (flash_info_t * info)
32{
33 int i;
34
35 switch (info->flash_id & FLASH_VENDMASK) {
36 case (AMD_MANUFACT & FLASH_VENDMASK):
37 printf ("AMD: ");
38 break;
39 default:
40 printf ("Unknown Vendor ");
41 break;
42 }
43
44 switch (info->flash_id & FLASH_TYPEMASK) {
45 case (AMD_ID_PL160CB & FLASH_TYPEMASK):
46 printf ("AM29PL160CB (16Mbit)\n");
47 break;
48 default:
49 printf ("Unknown Chip Type\n");
50 goto Done;
51 break;
52 }
53
54 printf (" Size: %ld MB in %d Sectors\n",
55 info->size >> 20, info->sector_count);
56
57 printf (" Sector Start Addresses:");
58 for (i = 0; i < info->sector_count; i++) {
59 if ((i % 5) == 0) {
60 printf ("\n ");
61 }
62 printf (" %08lX%s", info->start[i],
63 info->protect[i] ? " (RO)" : " ");
64 }
65 printf ("\n");
66
67 Done:
68}
69
70
71unsigned long flash_init (void)
72{
73 int i, j;
74 ulong size = 0;
75
76 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
77 ulong flashbase = 0;
78
79 flash_info[i].flash_id =
80 (AMD_MANUFACT & FLASH_VENDMASK) |
81 (AMD_ID_PL160CB & FLASH_TYPEMASK);
82 flash_info[i].size = FLASH_BANK_SIZE;
83 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
84 memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
85 if (i == 0)
86 flashbase = PHYS_FLASH_1;
87 else
88 panic ("configured to many flash banks!\n");
89
90 for (j = 0; j < flash_info[i].sector_count; j++) {
91 if (j == 0) {
92 /* 1st is 16 KiB */
93 flash_info[i].start[j] = flashbase;
94 }
95 if ((j >= 1) && (j <= 2)) {
96 /* 2nd and 3rd are 8 KiB */
97 flash_info[i].start[j] =
98 flashbase + 0x4000 + 0x2000 * (j - 1);
99 }
100 if (j == 3) {
101 /* 4th is 224 KiB */
102 flash_info[i].start[j] = flashbase + 0x8000;
103 }
104 if ((j >= 4) && (j <= 10)) {
105 /* rest is 256 KiB */
106 flash_info[i].start[j] =
107 flashbase + 0x40000 + 0x40000 * (j -
108 4);
109 }
110 }
111 size += flash_info[i].size;
112 }
113
114 flash_protect (FLAG_PROTECT_SET,
115 CFG_FLASH_BASE,
116 CFG_FLASH_BASE + 0x3ffff, &flash_info[0]);
117
118 return size;
119}
120
121
122#define CMD_READ_ARRAY 0x00F0
123#define CMD_UNLOCK1 0x00AA
124#define CMD_UNLOCK2 0x0055
125#define CMD_ERASE_SETUP 0x0080
126#define CMD_ERASE_CONFIRM 0x0030
127#define CMD_PROGRAM 0x00A0
128#define CMD_UNLOCK_BYPASS 0x0020
129
130#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1)))
131#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1)))
132
133#define BIT_ERASE_DONE 0x0080
134#define BIT_RDY_MASK 0x0080
135#define BIT_PROGRAM_ERROR 0x0020
136#define BIT_TIMEOUT 0x80000000 /* our flag */
137
138#define READY 1
139#define ERR 2
140#define TMO 4
141
142
143int flash_erase (flash_info_t * info, int s_first, int s_last)
144{
145 ulong result;
146 int iflag, cflag, prot, sect;
147 int rc = ERR_OK;
148 int chip1;
149
150 /* first look for protection bits */
151
152 if (info->flash_id == FLASH_UNKNOWN)
153 return ERR_UNKNOWN_FLASH_TYPE;
154
155 if ((s_first < 0) || (s_first > s_last)) {
156 return ERR_INVAL;
157 }
158
159 if ((info->flash_id & FLASH_VENDMASK) !=
160 (AMD_MANUFACT & FLASH_VENDMASK)) {
161 return ERR_UNKNOWN_FLASH_VENDOR;
162 }
163
164 prot = 0;
165 for (sect = s_first; sect <= s_last; ++sect) {
166 if (info->protect[sect]) {
167 prot++;
168 }
169 }
170 if (prot)
171 return ERR_PROTECTED;
172
173 /*
174 * Disable interrupts which might cause a timeout
175 * here. Remember that our exception vectors are
176 * at address 0 in the flash, and we don't want a
177 * (ticker) exception to happen while the flash
178 * chip is in programming mode.
179 */
180
181 cflag = icache_status ();
182 icache_disable ();
183 iflag = disable_interrupts ();
184
185 printf ("\n");
186
187 /* Start erase on unprotected sectors */
188 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
189 printf ("Erasing sector %2d ... ", sect);
190
191 /* arm simple, non interrupt dependent timer */
192 set_timer (0);
193
194 if (info->protect[sect] == 0) { /* not protected */
195 volatile u16 *addr =
196 (volatile u16 *) (info->start[sect]);
197
198 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
199 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
200 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
201
202 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
203 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
204 *addr = CMD_ERASE_CONFIRM;
205
206 /* wait until flash is ready */
207 chip1 = 0;
208
209 do {
210 result = *addr;
211
212 /* check timeout */
213 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
214 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
215 chip1 = TMO;
216 break;
217 }
218
219 if (!chip1
220 && (result & 0xFFFF) & BIT_ERASE_DONE)
221 chip1 = READY;
222
223 } while (!chip1);
224
225 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
226
227 if (chip1 == ERR) {
228 rc = ERR_PROG_ERROR;
229 goto outahere;
230 }
231 if (chip1 == TMO) {
232 rc = ERR_TIMOUT;
233 goto outahere;
234 }
235
236 printf ("ok.\n");
237 } else { /* it was protected */
238
239 printf ("protected!\n");
240 }
241 }
242
243 if (ctrlc ())
244 printf ("User Interrupt!\n");
245
246 outahere:
247 /* allow flash to settle - wait 10 ms */
248 udelay (10000);
249
250 if (iflag)
251 enable_interrupts ();
252
253 if (cflag)
254 icache_enable ();
255
256 return rc;
257}
258
Wolfgang Denk8de7ed32006-03-11 22:56:07 +0100259static int write_word (flash_info_t * info, ulong dest, ulong data)
wdenk4e5ca3e2003-12-08 01:34:36 +0000260{
261 volatile u16 *addr = (volatile u16 *) dest;
262 ulong result;
263 int rc = ERR_OK;
264 int cflag, iflag;
265 int chip1;
266
267 /*
268 * Check if Flash is (sufficiently) erased
269 */
270 result = *addr;
271 if ((result & data) != data)
272 return ERR_NOT_ERASED;
273
274
275 /*
276 * Disable interrupts which might cause a timeout
277 * here. Remember that our exception vectors are
278 * at address 0 in the flash, and we don't want a
279 * (ticker) exception to happen while the flash
280 * chip is in programming mode.
281 */
282
283 cflag = icache_status ();
284 icache_disable ();
285 iflag = disable_interrupts ();
286
287 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
288 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
289 MEM_FLASH_ADDR1 = CMD_PROGRAM;
290 *addr = data;
291
292 /* arm simple, non interrupt dependent timer */
293 set_timer (0);
294
295 /* wait until flash is ready */
296 chip1 = 0;
297 do {
298 result = *addr;
299
300 /* check timeout */
301 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
302 chip1 = ERR | TMO;
303 break;
304 }
305 if (!chip1 && ((result & 0x80) == (data & 0x80)))
306 chip1 = READY;
307
308 } while (!chip1);
309
310 *addr = CMD_READ_ARRAY;
311
312 if (chip1 == ERR || *addr != data)
313 rc = ERR_PROG_ERROR;
314
315 if (iflag)
316 enable_interrupts ();
317
318 if (cflag)
319 icache_enable ();
320
321 return rc;
322}
323
324
325int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
326{
327 ulong wp, data;
328 int rc;
329
330 if (addr & 1) {
331 printf ("unaligned destination not supported\n");
332 return ERR_ALIGN;
333 }
334
335#if 0
336 if (cnt & 1) {
337 printf ("odd transfer sizes not supported\n");
338 return ERR_ALIGN;
339 }
340#endif
341
342 wp = addr;
343
344 if (addr & 1) {
345 data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
346 src);
347 if ((rc = write_word (info, wp - 1, data)) != 0) {
348 return (rc);
349 }
350 src += 1;
351 wp += 1;
352 cnt -= 1;
353 }
354
355 while (cnt >= 2) {
356 data = *((volatile u16 *) src);
357 if ((rc = write_word (info, wp, data)) != 0) {
358 return (rc);
359 }
360 src += 2;
361 wp += 2;
362 cnt -= 2;
363 }
364
365 if (cnt == 1) {
366 data = (*((volatile u8 *) src) << 8) |
367 *((volatile u8 *) (wp + 1));
368 if ((rc = write_word (info, wp, data)) != 0) {
369 return (rc);
370 }
371 src += 1;
372 wp += 1;
373 cnt -= 1;
374 }
375
376 return ERR_OK;
377}