blob: f725b79cd4f873cd9f1e58e9e3fafc16ecb69154 [file] [log] [blame]
Andrej Rosano3bf801a2015-04-08 18:56:30 +02001/*
2 * USB armory MkI board configuration settings
3 * http://inversepath.com/usbarmory
4 *
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
7 *
8 * SPDX-License-Identifier:|____GPL-2.0+
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Gong Qianyu18fb0e32015-10-26 19:47:42 +080014#define CONFIG_SYS_FSL_CLK
Andrej Rosano3bf801a2015-04-08 18:56:30 +020015#define CONFIG_MXC_GPIO
16
17#include <asm/arch/imx-regs.h>
Andrej Rosano3bf801a2015-04-08 18:56:30 +020018
19#include <config_distro_defaults.h>
20
Andrej Rosano3bf801a2015-04-08 18:56:30 +020021/* U-Boot environment */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020022#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
23#define CONFIG_ENV_SIZE (8 * 1024)
24#define CONFIG_ENV_IS_IN_MMC
25#define CONFIG_SYS_MMC_ENV_DEV 0
26
27/* U-Boot general configurations */
28#define CONFIG_SYS_CBSIZE 512
29#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
30#define CONFIG_SYS_MAXARGS 16
31#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
32
33/* UART */
34#define CONFIG_MXC_UART
35#define CONFIG_MXC_UART_BASE UART1_BASE
36#define CONFIG_CONS_INDEX 1
Andrej Rosano3bf801a2015-04-08 18:56:30 +020037
38/* SD/MMC */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020039#define CONFIG_FSL_ESDHC
40#define CONFIG_SYS_FSL_ESDHC_ADDR 0
41#define CONFIG_SYS_FSL_ESDHC_NUM 1
Andrej Rosano3bf801a2015-04-08 18:56:30 +020042
43/* USB */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020044#define CONFIG_USB_EHCI_MX5
Andrej Rosano3bf801a2015-04-08 18:56:30 +020045#define CONFIG_MXC_USB_PORT 1
46#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
47#define CONFIG_MXC_USB_FLAGS 0
48
49/* I2C */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020050#define CONFIG_SYS_I2C
51#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020052#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
53#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020054
55/* Fuse */
56#define CONFIG_CMD_FUSE
57#define CONFIG_FSL_IIM
58
Andrej Rosano9a45ec32016-06-20 17:21:48 +020059/* U-Boot memory offsets */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020060#define CONFIG_LOADADDR 0x72000000
61#define CONFIG_SYS_TEXT_BASE 0x77800000
62#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Andrej Rosano9a45ec32016-06-20 17:21:48 +020063
64/* Linux boot */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020065#define CONFIG_HOSTNAME usbarmory
66#define CONFIG_BOOTCOMMAND \
67 "run distro_bootcmd; " \
68 "setenv bootargs console=${console} ${bootargs_default}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020069 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
Andrej Rosano3bf801a2015-04-08 18:56:30 +020070 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020071 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
Andrej Rosano3bf801a2015-04-08 18:56:30 +020072
73#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
74
75#include <config_distro_bootcmd.h>
76
77#define MEM_LAYOUT_ENV_SETTINGS \
78 "kernel_addr_r=0x70800000\0" \
79 "fdt_addr_r=0x71000000\0" \
80 "scriptaddr=0x70800000\0" \
81 "pxefile_addr_r=0x70800000\0" \
82 "ramdisk_addr_r=0x73000000\0"
83
84#define CONFIG_EXTRA_ENV_SETTINGS \
85 MEM_LAYOUT_ENV_SETTINGS \
86 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
87 "fdtfile=imx53-usbarmory.dtb\0" \
88 "console=ttymxc0,115200\0" \
89 BOOTENV
90
Andrej Rosanoa02ab5e2016-06-20 17:21:49 +020091#ifndef CONFIG_CMDLINE
92#define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
93#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
94#define USBARMORY_FIT_ADDR "0x70800000"
95#endif
96
Andrej Rosano3bf801a2015-04-08 18:56:30 +020097/* Physical Memory Map */
98#define CONFIG_NR_DRAM_BANKS 1
99#define PHYS_SDRAM CSD0_BASE_ADDR
100#define PHYS_SDRAM_SIZE (gd->ram_size)
101
102#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
103#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
104#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
105
106#define CONFIG_SYS_INIT_SP_OFFSET \
107 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
108#define CONFIG_SYS_INIT_SP_ADDR \
109 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
110
111#define CONFIG_SYS_MEMTEST_START 0x70000000
112#define CONFIG_SYS_MEMTEST_END 0x90000000
113
114#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
115
116#endif /* __CONFIG_H */