Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 1 | /** |
| 2 | * @file IxEthAcc.c |
| 3 | * |
| 4 | * @author Intel Corporation |
| 5 | * @date 20-Feb-2001 |
| 6 | * |
| 7 | * @brief This file contains the implementation of the IXP425 Ethernet Access Component |
| 8 | * |
| 9 | * Design Notes: |
| 10 | * |
| 11 | * @par |
| 12 | * IXP400 SW Release version 2.0 |
| 13 | * |
| 14 | * -- Copyright Notice -- |
| 15 | * |
| 16 | * @par |
| 17 | * Copyright 2001-2005, Intel Corporation. |
| 18 | * All rights reserved. |
| 19 | * |
| 20 | * @par |
Wolfgang Denk | cb3761e | 2013-07-28 22:12:47 +0200 | [diff] [blame^] | 21 | * SPDX-License-Identifier: BSD-3-Clause |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 22 | * @par |
| 23 | * -- End of Copyright Notice -- |
| 24 | */ |
| 25 | |
| 26 | |
| 27 | |
| 28 | #include "IxEthAcc.h" |
| 29 | #ifdef CONFIG_IXP425_COMPONENT_ETHDB |
| 30 | #include "IxEthDB.h" |
| 31 | #endif |
| 32 | #include "IxFeatureCtrl.h" |
| 33 | |
| 34 | #include "IxEthAcc_p.h" |
| 35 | #include "IxEthAccMac_p.h" |
| 36 | #include "IxEthAccMii_p.h" |
| 37 | |
| 38 | /** |
| 39 | * @addtogroup IxEthAcc |
| 40 | *@{ |
| 41 | */ |
| 42 | |
| 43 | |
| 44 | /** |
| 45 | * @brief System-wide information data strucure. |
| 46 | * |
| 47 | * @ingroup IxEthAccPri |
| 48 | * |
| 49 | */ |
| 50 | |
| 51 | IxEthAccInfo ixEthAccDataInfo; |
| 52 | extern PUBLIC IxEthAccMacState ixEthAccMacState[]; |
| 53 | extern PUBLIC IxOsalMutex ixEthAccControlInterfaceMutex; |
| 54 | |
| 55 | /** |
| 56 | * @brief System-wide information |
| 57 | * |
| 58 | * @ingroup IxEthAccPri |
| 59 | * |
| 60 | */ |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 61 | BOOL ixEthAccServiceInit = false; |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 62 | |
| 63 | /* global filtering bit mask */ |
| 64 | PUBLIC UINT32 ixEthAccNewSrcMask; |
| 65 | |
| 66 | /** |
| 67 | * @brief Per port information data strucure. |
| 68 | * |
| 69 | * @ingroup IxEthAccPri |
| 70 | * |
| 71 | */ |
| 72 | |
| 73 | IxEthAccPortDataInfo ixEthAccPortData[IX_ETH_ACC_NUMBER_OF_PORTS]; |
| 74 | |
| 75 | PUBLIC IxEthAccStatus ixEthAccInit() |
| 76 | { |
| 77 | #ifdef CONFIG_IXP425_COMPONENT_ETHDB |
| 78 | /* |
| 79 | * Initialize Control plane |
| 80 | */ |
Marek Vasut | 0c7857f | 2012-03-06 01:00:52 +0100 | [diff] [blame] | 81 | if (ixEthDBInit() != IX_ETH_DB_SUCCESS) |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 82 | { |
| 83 | IX_ETH_ACC_WARNING_LOG("ixEthAccInit: EthDB init failed\n", 0, 0, 0, 0, 0, 0); |
| 84 | |
| 85 | return IX_ETH_ACC_FAIL; |
| 86 | } |
| 87 | #endif |
| 88 | |
| 89 | if (IX_FEATURE_CTRL_SWCONFIG_ENABLED == ixFeatureCtrlSwConfigurationCheck (IX_FEATURECTRL_ETH_LEARNING)) |
| 90 | { |
| 91 | ixEthAccNewSrcMask = (~0); /* want all the bits */ |
| 92 | } |
| 93 | else |
| 94 | { |
| 95 | ixEthAccNewSrcMask = (~IX_ETHACC_NE_NEWSRCMASK); /* want all but the NewSrc bit */ |
| 96 | } |
| 97 | |
| 98 | /* |
| 99 | * Initialize Data plane |
| 100 | */ |
| 101 | if ( ixEthAccInitDataPlane() != IX_ETH_ACC_SUCCESS ) |
| 102 | { |
| 103 | IX_ETH_ACC_WARNING_LOG("ixEthAccInit: data plane init failed\n", 0, 0, 0, 0, 0, 0); |
| 104 | |
| 105 | return IX_ETH_ACC_FAIL; |
| 106 | } |
| 107 | |
| 108 | |
| 109 | if ( ixEthAccQMgrQueuesConfig() != IX_ETH_ACC_SUCCESS ) |
| 110 | { |
| 111 | IX_ETH_ACC_WARNING_LOG("ixEthAccInit: queue config failed\n", 0, 0, 0, 0, 0, 0); |
| 112 | |
| 113 | return IX_ETH_ACC_FAIL; |
| 114 | } |
| 115 | |
| 116 | /* |
| 117 | * Initialize MII |
| 118 | */ |
| 119 | if ( ixEthAccMiiInit() != IX_ETH_ACC_SUCCESS ) |
| 120 | { |
| 121 | IX_ETH_ACC_WARNING_LOG("ixEthAccInit: Mii init failed\n", 0, 0, 0, 0, 0, 0); |
| 122 | |
| 123 | return IX_ETH_ACC_FAIL; |
| 124 | } |
| 125 | |
| 126 | /* |
| 127 | * Initialize MAC I/O memory |
| 128 | */ |
| 129 | if (ixEthAccMacMemInit() != IX_ETH_ACC_SUCCESS) |
| 130 | { |
| 131 | IX_ETH_ACC_WARNING_LOG("ixEthAccInit: Mac init failed\n", 0, 0, 0, 0, 0, 0); |
| 132 | |
| 133 | return IX_ETH_ACC_FAIL; |
| 134 | } |
| 135 | |
| 136 | /* |
| 137 | * Initialize control plane interface lock |
| 138 | */ |
| 139 | if (ixOsalMutexInit(&ixEthAccControlInterfaceMutex) != IX_SUCCESS) |
| 140 | { |
| 141 | IX_ETH_ACC_WARNING_LOG("ixEthAccInit: Control plane interface lock initialization failed\n", 0, 0, 0, 0, 0, 0); |
| 142 | |
| 143 | return IX_ETH_ACC_FAIL; |
| 144 | } |
| 145 | |
| 146 | /* initialiasation is complete */ |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 147 | ixEthAccServiceInit = true; |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 148 | |
| 149 | return IX_ETH_ACC_SUCCESS; |
| 150 | |
| 151 | } |
| 152 | |
| 153 | PUBLIC void ixEthAccUnload(void) |
| 154 | { |
| 155 | IxEthAccPortId portId; |
| 156 | |
| 157 | if ( IX_ETH_ACC_IS_SERVICE_INITIALIZED() ) |
| 158 | { |
| 159 | /* check none of the port is still active */ |
| 160 | for (portId = 0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++) |
| 161 | { |
| 162 | if ( IX_ETH_IS_PORT_INITIALIZED(portId) ) |
| 163 | { |
| 164 | if (ixEthAccMacState[portId].portDisableState == ACTIVE) |
| 165 | { |
| 166 | IX_ETH_ACC_WARNING_LOG("ixEthAccUnload: port %u still active, bail out\n", portId, 0, 0, 0, 0, 0); |
| 167 | return; |
| 168 | } |
| 169 | } |
| 170 | } |
| 171 | |
| 172 | /* unmap the memory areas */ |
| 173 | ixEthAccMiiUnload(); |
| 174 | ixEthAccMacUnload(); |
| 175 | |
| 176 | /* set all ports as uninitialized */ |
| 177 | for (portId = 0; portId < IX_ETH_ACC_NUMBER_OF_PORTS; portId++) |
| 178 | { |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 179 | ixEthAccPortData[portId].portInitialized = false; |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 180 | } |
| 181 | |
| 182 | /* uninitialize the service */ |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 183 | ixEthAccServiceInit = false; |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 184 | } |
| 185 | } |
| 186 | |
| 187 | PUBLIC IxEthAccStatus ixEthAccPortInit( IxEthAccPortId portId) |
| 188 | { |
| 189 | |
| 190 | IxEthAccStatus ret=IX_ETH_ACC_SUCCESS; |
| 191 | |
| 192 | if ( ! IX_ETH_ACC_IS_SERVICE_INITIALIZED() ) |
| 193 | { |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 194 | return(IX_ETH_ACC_FAIL); |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 195 | } |
| 196 | |
| 197 | /* |
| 198 | * Check for valid port |
| 199 | */ |
| 200 | |
| 201 | if ( ! IX_ETH_ACC_IS_PORT_VALID(portId) ) |
| 202 | { |
| 203 | return (IX_ETH_ACC_INVALID_PORT); |
| 204 | } |
| 205 | |
| 206 | if (IX_ETH_ACC_SUCCESS != ixEthAccSingleEthNpeCheck(portId)) |
| 207 | { |
| 208 | IX_ETH_ACC_WARNING_LOG("EthAcc: Unavailable Eth %d: Cannot initialize Eth port.\n",(INT32) portId,0,0,0,0,0); |
| 209 | return IX_ETH_ACC_SUCCESS ; |
| 210 | } |
| 211 | |
| 212 | if ( IX_ETH_IS_PORT_INITIALIZED(portId) ) |
| 213 | { |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 214 | /* Already initialized */ |
| 215 | return(IX_ETH_ACC_FAIL); |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | if(ixEthAccMacInit(portId)!=IX_ETH_ACC_SUCCESS) |
| 219 | { |
| 220 | return IX_ETH_ACC_FAIL; |
| 221 | } |
| 222 | |
| 223 | /* |
| 224 | * Set the port init flag. |
| 225 | */ |
| 226 | |
York Sun | 472d546 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 227 | ixEthAccPortData[portId].portInitialized = true; |
Wolfgang Denk | ba94a1b | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 228 | |
| 229 | #ifdef CONFIG_IXP425_COMPONENT_ETHDB |
| 230 | /* init learning/filtering database structures for this port */ |
| 231 | ixEthDBPortInit(portId); |
| 232 | #endif |
| 233 | |
| 234 | return(ret); |
| 235 | } |
| 236 | |
| 237 | |