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Simon Glass7dcc2f72021-08-18 21:40:25 -06001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Main sandbox devicetree
4 */
5
Simon Glass714a5622014-02-26 15:59:14 -07006/dts-v1/;
7
Simon Glasse676f432019-05-18 11:59:48 -06008#include <config.h>
9
Simon Glass714a5622014-02-26 15:59:14 -070010/ {
Simon Glass0b304a22014-10-13 23:41:48 -060011 #address-cells = <1>;
Simon Glass20806e72015-03-05 12:25:13 -070012 #size-cells = <1>;
Simon Glassd63b5b42017-06-15 21:37:53 -060013 model = "sandbox";
Heinrich Schuchardt15ab77c2019-11-09 09:39:01 +010014 compatible = "sandbox";
Simon Glass0b304a22014-10-13 23:41:48 -060015
Simon Glass9569c402015-03-05 12:25:26 -070016 aliases {
Simon Glass46af3602015-04-20 12:37:28 -060017 i2c0 = &i2c_0;
Tom Rini42c64d12020-02-11 12:41:23 -050018 pci0 = &pcic;
Simon Glass46af3602015-04-20 12:37:28 -060019 rtc0 = &rtc_0;
Mario Six957983e2018-08-09 14:51:19 +020020 axi0 = &axi;
Simon Glass87dac6b2019-05-18 11:59:42 -060021 spi0 = &spi;
Simon Glass9569c402015-03-05 12:25:26 -070022 };
23
Simon Glass8de98962022-10-20 18:23:15 -060024 binman: binman {
25 };
26
Simon Glasse676f432019-05-18 11:59:48 -060027 memory {
Tom Riniaa6e94d2022-11-16 13:10:37 -050028 reg = <0 CFG_SYS_SDRAM_SIZE>;
Simon Glasse676f432019-05-18 11:59:48 -060029 };
30
Heinrich Schuchardt1ecea742020-03-14 12:13:39 +010031 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
34 ranges;
35
36 reservation_test0 {
37 size = <0x4000>;
38 alignment = <0x2000>;
39 };
40
41 reservation_test1: restest@a000 {
42 reg = <0x00d0a000 0x2000>;
43 };
44
45 reservation_test2: restest@7000 {
46 reg = <0x00d07000 0x1000>;
47 };
48 };
49
Simon Glasse6c5c942018-10-01 12:22:08 -060050 cros_ec: cros-ec {
Simon Glass3fbb7872015-03-26 09:29:39 -060051 reg = <0 0>;
Simon Glass8c103c32023-02-13 08:56:33 -070052 bootph-some-ram;
Simon Glass3fbb7872015-03-26 09:29:39 -060053 compatible = "google,cros-ec-sandbox";
Simon Glass39741c02014-02-27 13:25:59 -070054 };
55
Yannick Fertré23f965a2019-10-07 15:29:05 +020056 dsi_host: dsi_host {
57 compatible = "sandbox,dsi-host";
58 status = "okay";
59 };
60
Joe Hershbergerf40a31e2018-07-02 14:47:54 -050061 ethrawbus {
62 compatible = "sandbox,eth-raw-bus";
63 skip-localhost = <0>;
64 };
65
Simon Glassf4d84572015-05-22 15:42:16 -060066 eth@10002000 {
67 compatible = "sandbox,eth";
68 reg = <0x10002000 0x1000>;
Simon Glassf4d84572015-05-22 15:42:16 -060069 };
70
Simon Glass46af3602015-04-20 12:37:28 -060071 i2c_0: i2c@0 {
Simon Glass776f96f2014-12-10 08:55:53 -070072 #address-cells = <1>;
73 #size-cells = <0>;
Simon Glass20806e72015-03-05 12:25:13 -070074 reg = <0 0>;
Simon Glass776f96f2014-12-10 08:55:53 -070075 compatible = "sandbox,i2c";
76 clock-frequency = <400000>;
Masahiro Yamada9c6a3c62015-08-27 12:44:30 +090077 pinctrl-names = "default";
78 pinctrl-0 = <&pinctrl_i2c0>;
Simon Glassdd8a2902023-02-22 09:34:04 -070079 bootph-pre-ram;
Simon Glassa89c3a02017-04-10 11:34:51 -060080 };
81
Tom Rini42c64d12020-02-11 12:41:23 -050082 pcic: pci@0 {
Simon Glass9569c402015-03-05 12:25:26 -070083 compatible = "sandbox,pci";
84 device_type = "pci";
Tom Rini42c64d12020-02-11 12:41:23 -050085 bus-range = <0x00 0xff>;
Simon Glass9569c402015-03-05 12:25:26 -070086 #address-cells = <3>;
87 #size-cells = <2>;
88 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
89 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
Simon Glass282e29e2018-12-10 10:37:45 -070090 };
91
Simon Glass87dac6b2019-05-18 11:59:42 -060092 spi: spi@0 {
Simon Glass8c103c32023-02-13 08:56:33 -070093 bootph-some-ram;
Simon Glassf4d84572015-05-22 15:42:16 -060094 #address-cells = <1>;
95 #size-cells = <0>;
96 reg = <0 0>;
97 compatible = "sandbox,spi";
98 cs-gpios = <0>, <&gpio_a 0>;
Joe Hershberger3ea143a2015-03-22 17:09:13 -050099 };
Simon Glass714a5622014-02-26 15:59:14 -0700100};
Simon Glass3fbb7872015-03-26 09:29:39 -0600101
Simon Glassdc8c91a2019-05-18 11:59:41 -0600102#include "sandbox.dtsi"
Simon Glass3fbb7872015-03-26 09:29:39 -0600103#include "cros-ec-keyboard.dtsi"
Przemyslaw Marczak9038cd52015-05-13 13:38:35 +0200104#include "sandbox_pmic.dtsi"
Simon Glass8de98962022-10-20 18:23:15 -0600105
Simon Glass9ee2f352023-02-22 09:34:05 -0700106#if IS_ENABLED(CONFIG_SUPPORT_VPL)
Simon Glass8de98962022-10-20 18:23:15 -0600107#include "sandbox_vpl.dtsi"
108#endif