Rajeshwari Birje | 76dd9b6 | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Samsung Electronics |
| 3 | * |
| 4 | * Configuration settings for the SAMSUNG EXYNOS5420 board. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_5420_H |
| 10 | #define __CONFIG_5420_H |
| 11 | |
| 12 | #include <configs/exynos5-dt.h> |
| 13 | |
| 14 | #define CONFIG_EXYNOS5420 /* which is in a Exynos5 Family */ |
| 15 | #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ |
| 16 | |
| 17 | #undef CONFIG_DEFAULT_DEVICE_TREE |
| 18 | #define CONFIG_DEFAULT_DEVICE_TREE exynos5420-smdk5420 |
| 19 | |
Rajeshwari Birje | 0fcac1a | 2013-12-26 09:44:27 +0530 | [diff] [blame] | 20 | #define CONFIG_VAR_SIZE_SPL |
| 21 | |
Rajeshwari Birje | 76dd9b6 | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 22 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 23 | #define CONFIG_SYS_TEXT_BASE 0x23E00000 |
| 24 | |
| 25 | #define CONFIG_BOARD_REV_GPIO_COUNT 2 |
| 26 | |
| 27 | /* MACH_TYPE_SMDK5420 macro will be removed once added to mach-types */ |
| 28 | #define MACH_TYPE_SMDK5420 8002 /* Temporary number */ |
| 29 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420 |
| 30 | |
| 31 | /* select serial console configuration */ |
| 32 | #define CONFIG_SERIAL3 /* use SERIAL 3 */ |
| 33 | |
Rajeshwari Birje | 0fcac1a | 2013-12-26 09:44:27 +0530 | [diff] [blame] | 34 | #ifdef CONFIG_VAR_SIZE_SPL |
| 35 | #define CONFIG_SPL_TEXT_BASE 0x02024410 |
| 36 | #else |
Rajeshwari Birje | 76dd9b6 | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 37 | #define CONFIG_SPL_TEXT_BASE 0x02024400 |
Rajeshwari Birje | 0fcac1a | 2013-12-26 09:44:27 +0530 | [diff] [blame] | 38 | #endif |
Rajeshwari Birje | 76dd9b6 | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 39 | |
| 40 | #define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000" |
| 41 | |
| 42 | #define CONFIG_SYS_PROMPT "SMDK5420 # " |
| 43 | #define CONFIG_IDENT_STRING " for SMDK5420" |
| 44 | |
| 45 | #define CONFIG_IRAM_TOP 0x02074000 |
| 46 | /* |
| 47 | * Put the initial stack pointer 1KB below this to allow room for the |
| 48 | * SPL marker. This value is arbitrary, but gd_t is placed starting here. |
| 49 | */ |
| 50 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) |
| 51 | |
| 52 | #define CONFIG_MAX_I2C_NUM 11 |
| 53 | |
| 54 | #endif /* __CONFIG_5420_H */ |