blob: d44da37ec72bd0a5c10fc237e6b955aa99d2aab0 [file] [log] [blame]
TsiChungLiew4a442d32007-08-16 19:23:50 -05001/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
Peter Tyser561858e2008-11-03 09:30:59 -060025#include <timestamp.h>
TsiChungLiew4a442d32007-08-16 19:23:50 -050026#include "version.h"
27
28#ifndef CONFIG_IDENT_STRING
29#define CONFIG_IDENT_STRING ""
30#endif
31
32#define _START _start
33#define _FAULT _fault
34
35#define SAVE_ALL \
36 move.w #0x2700,%sr; /* disable intrs */ \
37 subl #60,%sp; /* space for 15 regs */ \
38 moveml %d0-%d7/%a0-%a6,%sp@;
39
40#define RESTORE_ALL \
41 moveml %sp@,%d0-%d7/%a0-%a6; \
42 addl #60,%sp; /* space for 15 regs */ \
43 rte;
44
45.text
46/*
47 * Vector table. This is used for initial platform startup.
48 * These vectors are to catch any un-intended traps.
49 */
50_vectors:
51
52INITSP: .long 0x00000000 /* Initial SP */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020053INITPC: .long _START /* Initial PC */
TsiChungLiew4a442d32007-08-16 19:23:50 -050054vector02: .long _FAULT /* Access Error */
55vector03: .long _FAULT /* Address Error */
56vector04: .long _FAULT /* Illegal Instruction */
57vector05: .long _FAULT /* Reserved */
58vector06: .long _FAULT /* Reserved */
59vector07: .long _FAULT /* Reserved */
60vector08: .long _FAULT /* Privilege Violation */
61vector09: .long _FAULT /* Trace */
62vector0A: .long _FAULT /* Unimplemented A-Line */
63vector0B: .long _FAULT /* Unimplemented F-Line */
64vector0C: .long _FAULT /* Debug Interrupt */
65vector0D: .long _FAULT /* Reserved */
66vector0E: .long _FAULT /* Format Error */
67vector0F: .long _FAULT /* Unitialized Int. */
68
69/* Reserved */
70vector10_17:
71.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72
73vector18: .long _FAULT /* Spurious Interrupt */
74vector19: .long _FAULT /* Autovector Level 1 */
75vector1A: .long _FAULT /* Autovector Level 2 */
76vector1B: .long _FAULT /* Autovector Level 3 */
77vector1C: .long _FAULT /* Autovector Level 4 */
78vector1D: .long _FAULT /* Autovector Level 5 */
79vector1E: .long _FAULT /* Autovector Level 6 */
80vector1F: .long _FAULT /* Autovector Level 7 */
81
82/* TRAP #0 - #15 */
83vector20_2F:
84.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86
87/* Reserved */
88vector30_3F:
89.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91
92vector64_127:
93.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101
102vector128_191:
103.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
104.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111
112vector192_255:
113.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121
122 .text
123
124 .globl _start
125_start:
126 nop
127 nop
128 move.w #0x2700,%sr /* Mask off Interrupt */
129
130 /* Set vector base register at the beginning of the Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131 move.l #CONFIG_SYS_FLASH_BASE, %d0
TsiChungLiew4a442d32007-08-16 19:23:50 -0500132 movec %d0, %VBR
133
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
TsiChungLiew4a442d32007-08-16 19:23:50 -0500135 movec %d0, %RAMBAR1
136
137 /* invalidate and disable cache */
138 move.l #0x01000000, %d0 /* Invalidate cache cmd */
139 movec %d0, %CACR /* Invalidate cache */
140 nop
141 move.l #0, %d0
142 movec %d0, %ACR0
143 movec %d0, %ACR1
144
145 /* initialize general use internal ram */
146 move.l #0, %d0
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
148 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
TsiChungLiew4a442d32007-08-16 19:23:50 -0500149 move.l %d0, (%a1)
150 move.l %d0, (%a2)
151
152 /* set stackpointer to end of internal ram to get some stackspace for the
153 first c-code */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
TsiChungLiew4a442d32007-08-16 19:23:50 -0500155 clr.l %sp@-
156
157 move.l #__got_start, %a5 /* put relocation table address to a5 */
158
159 bsr cpu_init_f /* run low-level CPU init code (from flash) */
160 bsr board_init_f /* run low-level board init code (from flash) */
161
162 /* board_init_f() does not return */
163
164/*------------------------------------------------------------------------------*/
165
166/*
167 * void relocate_code (addr_sp, gd, addr_moni)
168 *
169 * This "function" does not return, instead it continues in RAM
170 * after relocating the monitor code.
171 *
172 * r3 = dest
173 * r4 = src
174 * r5 = length in bytes
175 * r6 = cachelinesize
176 */
177 .globl relocate_code
178relocate_code:
179 link.w %a6,#0
180 move.l 8(%a6), %sp /* set new stack pointer */
181
182 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
183 move.l 16(%a6), %a0 /* Save copy of Destination Address */
184
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185 move.l #CONFIG_SYS_MONITOR_BASE, %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500186 move.l #__init_end, %a2
187 move.l %a0, %a3
188
189 /* copy the code to RAM */
1901:
191 move.l (%a1)+, (%a3)+
192 cmp.l %a1,%a2
193 bgt.s 1b
194
195/*
196 * We are done. Do not return, instead branch to second part of board
197 * initialization, now running from RAM.
198 */
199 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500201 jmp (%a1)
202
203in_ram:
204
205clear_bss:
206 /*
207 * Now clear BSS segment
208 */
209 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500211 move.l %a0, %d1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
TsiChungLiew4a442d32007-08-16 19:23:50 -05002136:
214 clr.l (%a1)+
215 cmp.l %a1,%d1
216 bgt.s 6b
217
218 /*
219 * fix got table in RAM
220 */
221 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500223 move.l %a1,%a5 /* * fix got pointer register a5 */
224
225 move.l %a0, %a2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
TsiChungLiew4a442d32007-08-16 19:23:50 -0500227
2287:
229 move.l (%a1),%d1
230 sub.l #_start,%d1
231 add.l %a0,%d1
232 move.l %d1,(%a1)+
233 cmp.l %a2, %a1
234 bne 7b
235
236 /* calculate relative jump to board_init_r in ram */
237 move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500239
240 /* set parameters for board_init_r */
241 move.l %a0,-(%sp) /* dest_addr */
242 move.l %d0,-(%sp) /* gd */
243 jsr (%a1)
244
245/*------------------------------------------------------------------------------*/
246/* exception code */
247 .globl _fault
248_fault:
249 jmp _fault
250 .globl _exc_handler
251
252_exc_handler:
253 SAVE_ALL
254 movel %sp,%sp@-
255 bsr exc_handler
256 addql #4,%sp
257 RESTORE_ALL
258
259 .globl _int_handler
260_int_handler:
261 SAVE_ALL
262 movel %sp,%sp@-
263 bsr int_handler
264 addql #4,%sp
265 RESTORE_ALL
266
267/*------------------------------------------------------------------------------*/
268/* cache functions */
269 .globl icache_enable
270icache_enable:
271 move.l #0x01000000, %d0 /* Invalidate cache cmd */
272 movec %d0, %CACR /* Invalidate cache */
273 nop
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274 move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500275 movec %d0, %ACR0 /* Enable cache */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200276 move.l #(CONFIG_SYS_FLASH_BASE + 0xc000), %d0 /* Setup cache mask */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500277 movec %d0, %ACR1 /* Enable cache */
278
279 move.l #0x80400100, %d0 /* Setup cache mask */
280 movec %d0, %CACR /* Enable cache */
281 nop
282
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200283 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500284 moveq #1, %d0
285 move.l %d0, (%a1)
286 rts
287
288 .globl icache_disable
289icache_disable:
290 move.l #0x00000100, %d0 /* Setup cache mask */
291 movec %d0, %CACR /* Disable cache */
292 clr.l %d0 /* Setup cache mask */
293 movec %d0, %ACR0
294 movec %d0, %ACR1
295
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200296 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500297 moveq #0, %d0
298 move.l %d0, (%a1)
299 rts
300
301 .globl icache_status
302icache_status:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200303 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500304 move.l (%a1), %d0
305 rts
306
307 .globl icache_invalid
308icache_invalid:
309 move.l #0x80600100, %d0 /* Setup cache mask */
310 movec %d0, %CACR /* Enable cache */
311 nop
312 rts
313
314 .globl dcache_enable
315dcache_enable:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200316 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500317 moveq #1, %d0
318 move.l %d0, (%a1)
319 rts
320
321 /* No dcache, just a dummy function */
322 .globl dcache_disable
323dcache_disable:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200324 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500325 moveq #0, %d0
326 move.l %d0, (%a1)
327 rts
328
329 .globl dcache_status
330dcache_status:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200331 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500332 move.l (%a1), %d0
333 rts
334
335/*------------------------------------------------------------------------------*/
336
337 .globl version_string
338version_string:
339 .ascii U_BOOT_VERSION
Peter Tyser561858e2008-11-03 09:30:59 -0600340 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
TsiChungLiew4a442d32007-08-16 19:23:50 -0500341 .ascii CONFIG_IDENT_STRING, "\0"
TsiChung Liew9b464322008-03-28 08:47:45 -0500342 .align 4