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Dirk Behme53736ba2010-12-11 11:01:00 -05001/*
2 * Register definitions for the OMAP3 McSPI Controller
3 *
4 * Copyright (C) 2010 Dirk Behme <dirk.behme@googlemail.com>
5 *
6 * Parts taken from linux/drivers/spi/omap2_mcspi.c
7 * Copyright (C) 2005, 2006 Nokia Corporation
8 *
9 * Modified by Ruslan Araslanov <ruslan.araslanov@vitecmm.com>
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#ifndef _OMAP3_SPI_H_
31#define _OMAP3_SPI_H_
32
Tom Rini4c0620b2012-08-08 14:29:51 -070033#ifdef CONFIG_AM33XX
34#define OMAP3_MCSPI1_BASE 0x48030100
35#define OMAP3_MCSPI2_BASE 0x481A0100
36#else
Dirk Behme53736ba2010-12-11 11:01:00 -050037#define OMAP3_MCSPI1_BASE 0x48098000
38#define OMAP3_MCSPI2_BASE 0x4809A000
39#define OMAP3_MCSPI3_BASE 0x480B8000
40#define OMAP3_MCSPI4_BASE 0x480BA000
Tom Rini4c0620b2012-08-08 14:29:51 -070041#endif
Dirk Behme53736ba2010-12-11 11:01:00 -050042
43#define OMAP3_MCSPI_MAX_FREQ 48000000
44
45/* OMAP3 McSPI registers */
46struct mcspi_channel {
47 unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */
48 unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */
49 unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */
50 unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */
51 unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */
52};
53
54struct mcspi {
55 unsigned char res1[0x10];
56 unsigned int sysconfig; /* 0x10 */
57 unsigned int sysstatus; /* 0x14 */
58 unsigned int irqstatus; /* 0x18 */
59 unsigned int irqenable; /* 0x1C */
60 unsigned int wakeupenable; /* 0x20 */
61 unsigned int syst; /* 0x24 */
62 unsigned int modulctrl; /* 0x28 */
63 struct mcspi_channel channel[4]; /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
64 /* channel1: 0x40 - 0x50, bus 0 & 1 */
65 /* channel2: 0x54 - 0x64, bus 0 & 1 */
66 /* channel3: 0x68 - 0x78, bus 0 */
67};
68
69/* per-register bitmasks */
70#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
71#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2)
72#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0)
73#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET (1 << 1)
74
75#define OMAP3_MCSPI_SYSSTATUS_RESETDONE (1 << 0)
76
77#define OMAP3_MCSPI_MODULCTRL_SINGLE (1 << 0)
78#define OMAP3_MCSPI_MODULCTRL_MS (1 << 2)
79#define OMAP3_MCSPI_MODULCTRL_STEST (1 << 3)
80
81#define OMAP3_MCSPI_CHCONF_PHA (1 << 0)
82#define OMAP3_MCSPI_CHCONF_POL (1 << 1)
83#define OMAP3_MCSPI_CHCONF_CLKD_MASK (0x0f << 2)
84#define OMAP3_MCSPI_CHCONF_EPOL (1 << 6)
85#define OMAP3_MCSPI_CHCONF_WL_MASK (0x1f << 7)
86#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY (0x01 << 12)
87#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY (0x02 << 12)
88#define OMAP3_MCSPI_CHCONF_TRM_MASK (0x03 << 12)
89#define OMAP3_MCSPI_CHCONF_DMAW (1 << 14)
90#define OMAP3_MCSPI_CHCONF_DMAR (1 << 15)
91#define OMAP3_MCSPI_CHCONF_DPE0 (1 << 16)
92#define OMAP3_MCSPI_CHCONF_DPE1 (1 << 17)
93#define OMAP3_MCSPI_CHCONF_IS (1 << 18)
94#define OMAP3_MCSPI_CHCONF_TURBO (1 << 19)
95#define OMAP3_MCSPI_CHCONF_FORCE (1 << 20)
96
97#define OMAP3_MCSPI_CHSTAT_RXS (1 << 0)
98#define OMAP3_MCSPI_CHSTAT_TXS (1 << 1)
99#define OMAP3_MCSPI_CHSTAT_EOT (1 << 2)
100
101#define OMAP3_MCSPI_CHCTRL_EN (1 << 0)
ajoycc1182b2012-11-17 21:10:15 +0000102#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0)
Dirk Behme53736ba2010-12-11 11:01:00 -0500103
104#define OMAP3_MCSPI_WAKEUPENABLE_WKEN (1 << 0)
105
106struct omap3_spi_slave {
107 struct spi_slave slave;
108 struct mcspi *regs;
109 unsigned int freq;
110 unsigned int mode;
111};
112
113static inline struct omap3_spi_slave *to_omap3_spi(struct spi_slave *slave)
114{
115 return container_of(slave, struct omap3_spi_slave, slave);
116}
117
jacopo mondi08b5ab02011-03-02 05:13:22 +0000118int omap3_spi_txrx(struct spi_slave *slave, unsigned int len, const u8 *txp,
119 u8 *rxp, unsigned long flags);
Dirk Behme53736ba2010-12-11 11:01:00 -0500120int omap3_spi_write(struct spi_slave *slave, unsigned int len, const u8 *txp,
121 unsigned long flags);
122int omap3_spi_read(struct spi_slave *slave, unsigned int len, u8 *rxp,
123 unsigned long flags);
124
125#endif /* _OMAP3_SPI_H_ */