blob: 77b6ac9ab96267090de3f8a5b460a4ab23a53a9d [file] [log] [blame]
Simon Glass51e9dad2015-03-02 12:40:54 -07001/dts-v1/;
2
3/include/ "skeleton.dtsi"
4/include/ "serial.dtsi"
Bin Mengb37b7b22018-07-19 03:07:33 -07005/include/ "reset.dtsi"
Bin Meng93f8a312015-07-15 16:23:39 +08006/include/ "rtc.dtsi"
Bin Meng80af3982015-11-13 00:11:22 -08007/include/ "tsc_timer.dtsi"
Simon Glass51e9dad2015-03-02 12:40:54 -07008
Simon Glass839d66c2020-11-05 06:32:17 -07009#include "smbios.dtsi"
10
Simon Glass51e9dad2015-03-02 12:40:54 -070011/ {
12 model = "Google Panther";
13 compatible = "google,panther", "intel,haswell";
14
15 aliases {
Bin Meng81aaa3d2016-01-27 00:56:34 -080016 spi0 = &spi;
Simon Glass51e9dad2015-03-02 12:40:54 -070017 };
18
19 config {
20 silent-console = <0>;
21 no-keyboard;
22 };
23
Simon Glass51e9dad2015-03-02 12:40:54 -070024 chosen {
25 stdout-path = "/serial";
26 };
27
Simon Glass548fb872015-08-27 19:54:48 -060028 pci {
29 compatible = "pci-x86";
30 #address-cells = <3>;
31 #size-cells = <2>;
32 u-boot,dm-pre-reloc;
33 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
34 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
35 0x01000000 0x0 0x1000 0x1000 0 0xf000>;
Simon Glass548fb872015-08-27 19:54:48 -060036
Simon Glassf2b85ab2016-01-18 20:19:21 -070037 pch@1f,0 {
38 reg = <0x0000f800 0 0 0 0>;
39 compatible = "intel,pch9";
Bin Meng3ddc1c72016-02-01 01:40:47 -080040 #address-cells = <1>;
41 #size-cells = <1>;
Simon Glassf2b85ab2016-01-18 20:19:21 -070042
Bin Meng81aaa3d2016-01-27 00:56:34 -080043 spi: spi {
Simon Glassf2b85ab2016-01-18 20:19:21 -070044 #address-cells = <1>;
45 #size-cells = <0>;
Bin Meng1f9eb592016-02-01 01:40:37 -080046 compatible = "intel,ich9-spi";
Simon Glassf2b85ab2016-01-18 20:19:21 -070047 spi-flash@0 {
48 #size-cells = <1>;
49 #address-cells = <1>;
50 reg = <0>;
51 compatible = "winbond,w25q64",
Neil Armstrong51e4e3e2019-02-10 10:16:21 +000052 "jedec,spi-nor";
Simon Glassf2b85ab2016-01-18 20:19:21 -070053 memory-map = <0xff800000 0x00800000>;
54 rw-mrc-cache {
55 label = "rw-mrc-cache";
56 reg = <0x003e0000 0x00010000>;
57 };
58 };
Simon Glass51e9dad2015-03-02 12:40:54 -070059 };
Bin Meng3ddc1c72016-02-01 01:40:47 -080060
61 gpioa {
62 compatible = "intel,ich6-gpio";
63 u-boot,dm-pre-reloc;
64 reg = <0 0x10>;
65 bank-name = "A";
66 };
67
68 gpiob {
69 compatible = "intel,ich6-gpio";
70 u-boot,dm-pre-reloc;
71 reg = <0x30 0x10>;
72 bank-name = "B";
73 };
74
75 gpioc {
76 compatible = "intel,ich6-gpio";
77 u-boot,dm-pre-reloc;
78 reg = <0x40 0x10>;
79 bank-name = "C";
80 };
Simon Glass51e9dad2015-03-02 12:40:54 -070081 };
82 };
83
Simon Glass6e474ea2015-08-22 18:31:37 -060084 tpm {
85 reg = <0xfed40000 0x5000>;
86 compatible = "infineon,slb9635lpc";
87 };
88
Simon Glass51e9dad2015-03-02 12:40:54 -070089};