blob: 12e35618f8749be3935d154f359a37e048e6e6ef [file] [log] [blame]
Michal Simek051a8ad2018-03-27 13:43:05 +02001// SPDX-License-Identifier: GPL-2.0+
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +05302/*
Michal Simek999667c2015-07-22 11:12:10 +02003 * Copyright (C) 2011 - 2015 Xilinx
4 * Copyright (C) 2012 National Instruments Corp.
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +05305 */
6/dts-v1/;
7#include "zynq-7000.dtsi"
8
9/ {
Michal Simek999667c2015-07-22 11:12:10 +020010 model = "Zynq ZC702 Development Board";
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +053011 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090012
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090013 aliases {
Michal Simek999667c2015-07-22 11:12:10 +020014 ethernet0 = &gem0;
15 i2c0 = &i2c0;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090016 serial0 = &uart1;
Jagan Tekie9cf6ec2015-08-15 23:15:21 +053017 spi0 = &qspi;
Michal Simekd9ae52c2015-11-30 16:13:03 +010018 mmc0 = &sdhci0;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090019 };
20
Michal Simekcc7978b2016-11-11 13:11:37 +010021 memory@0 {
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090022 device_type = "memory";
Michal Simek999667c2015-07-22 11:12:10 +020023 reg = <0x0 0x40000000>;
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090024 };
Michal Simek999667c2015-07-22 11:12:10 +020025
26 chosen {
Michal Simek936bbc52016-04-07 11:15:00 +020027 bootargs = "";
Michal Simek999667c2015-07-22 11:12:10 +020028 stdout-path = "serial0:115200n8";
29 };
30
Michal Simek91f9f172015-07-22 11:41:11 +020031 gpio-keys {
32 compatible = "gpio-keys";
Michal Simek91f9f172015-07-22 11:41:11 +020033 autorepeat;
34 sw14 {
35 label = "sw14";
36 gpios = <&gpio0 12 0>;
37 linux,code = <108>; /* down */
Sudeep Hollaa930ca52015-10-21 11:10:16 +010038 wakeup-source;
Michal Simek91f9f172015-07-22 11:41:11 +020039 autorepeat;
40 };
41 sw13 {
42 label = "sw13";
43 gpios = <&gpio0 14 0>;
44 linux,code = <103>; /* up */
Sudeep Hollaa930ca52015-10-21 11:10:16 +010045 wakeup-source;
Michal Simek91f9f172015-07-22 11:41:11 +020046 autorepeat;
47 };
48 };
49
Michal Simek999667c2015-07-22 11:12:10 +020050 leds {
51 compatible = "gpio-leds";
52
53 ds23 {
54 label = "ds23";
55 gpios = <&gpio0 10 0>;
56 linux,default-trigger = "heartbeat";
57 };
58 };
59
60 usb_phy0: phy0 {
61 compatible = "usb-nop-xceiv";
62 #phy-cells = <0>;
63 };
64};
65
66&amba {
67 ocm: sram@fffc0000 {
68 compatible = "mmio-sram";
69 reg = <0xfffc0000 0x10000>;
70 };
71};
72
73&can0 {
74 status = "okay";
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_can0_default>;
77};
78
79&clkc {
80 ps-clk-frequency = <33333333>;
81};
82
83&gem0 {
84 status = "okay";
85 phy-mode = "rgmii-id";
86 phy-handle = <&ethernet_phy>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_gem0_default>;
Punnaiah Choudary Kalluric9132b12016-02-03 15:27:18 +053089 phy-reset-gpio = <&gpio0 11 0>;
90 phy-reset-active-low;
Michal Simek999667c2015-07-22 11:12:10 +020091
92 ethernet_phy: ethernet-phy@7 {
93 reg = <7>;
Sai Pavan Boddu5fad1ab2017-03-06 18:17:19 +053094 device_type = "ethernet-phy";
Michal Simek999667c2015-07-22 11:12:10 +020095 };
96};
97
98&gpio0 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_gpio0_default>;
101};
102
103&i2c0 {
104 status = "okay";
105 clock-frequency = <400000>;
Chirag Parekh57bcc7f2016-12-27 22:07:58 +0530106 pinctrl-names = "default", "gpio";
Michal Simek999667c2015-07-22 11:12:10 +0200107 pinctrl-0 = <&pinctrl_i2c0_default>;
Chirag Parekh57bcc7f2016-12-27 22:07:58 +0530108 pinctrl-1 = <&pinctrl_i2c0_gpio>;
109 scl-gpios = <&gpio0 50 0>;
110 sda-gpios = <&gpio0 51 0>;
Michal Simek999667c2015-07-22 11:12:10 +0200111
Michal Simekc78a80a2018-02-06 14:00:30 +0100112 i2c-mux@74 {
Michal Simek999667c2015-07-22 11:12:10 +0200113 compatible = "nxp,pca9548";
114 #address-cells = <1>;
115 #size-cells = <0>;
116 reg = <0x74>;
117
118 i2c@0 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 reg = <0>;
122 si570: clock-generator@5d {
123 #clock-cells = <0>;
124 compatible = "silabs,si570";
125 temperature-stability = <50>;
126 reg = <0x5d>;
127 factory-fout = <156250000>;
128 clock-frequency = <148500000>;
129 };
130 };
131
Christian Kohn169050e2015-11-12 15:53:35 -0800132 i2c@1 {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 reg = <1>;
136 adv7511: hdmi-tx@39 {
137 compatible = "adi,adv7511";
138 reg = <0x39>;
139 adi,input-depth = <8>;
140 adi,input-colorspace = "yuv422";
141 adi,input-clock = "1x";
142 adi,input-style = <3>;
143 adi,input-justification = "right";
144 };
145 };
146
Michal Simek999667c2015-07-22 11:12:10 +0200147 i2c@2 {
148 #address-cells = <1>;
149 #size-cells = <0>;
150 reg = <2>;
151 eeprom@54 {
Javier Martinez Canillasa3e10642017-06-15 20:54:12 +0200152 compatible = "atmel,24c08";
Michal Simek999667c2015-07-22 11:12:10 +0200153 reg = <0x54>;
154 };
155 };
156
157 i2c@3 {
158 #address-cells = <1>;
159 #size-cells = <0>;
160 reg = <3>;
161 gpio@21 {
162 compatible = "ti,tca6416";
163 reg = <0x21>;
164 gpio-controller;
165 #gpio-cells = <2>;
166 };
167 };
168
169 i2c@4 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 reg = <4>;
173 rtc@51 {
174 compatible = "nxp,pcf8563";
175 reg = <0x51>;
176 };
177 };
178
179 i2c@7 {
180 #address-cells = <1>;
181 #size-cells = <0>;
182 reg = <7>;
183 hwmon@52 {
184 compatible = "ti,ucd9248";
185 reg = <52>;
186 };
187 hwmon@53 {
188 compatible = "ti,ucd9248";
189 reg = <53>;
190 };
191 hwmon@54 {
192 compatible = "ti,ucd9248";
193 reg = <54>;
194 };
195 };
196 };
197};
198
199&pinctrl0 {
200 pinctrl_can0_default: can0-default {
201 mux {
202 function = "can0";
203 groups = "can0_9_grp";
204 };
205
206 conf {
207 groups = "can0_9_grp";
208 slew-rate = <0>;
209 io-standard = <1>;
210 };
211
212 conf-rx {
213 pins = "MIO46";
214 bias-high-impedance;
215 };
216
217 conf-tx {
218 pins = "MIO47";
219 bias-disable;
220 };
221 };
222
223 pinctrl_gem0_default: gem0-default {
224 mux {
225 function = "ethernet0";
226 groups = "ethernet0_0_grp";
227 };
228
229 conf {
230 groups = "ethernet0_0_grp";
231 slew-rate = <0>;
232 io-standard = <4>;
233 };
234
235 conf-rx {
236 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
237 bias-high-impedance;
238 low-power-disable;
239 };
240
241 conf-tx {
242 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
243 bias-disable;
244 low-power-enable;
245 };
246
247 mux-mdio {
248 function = "mdio0";
249 groups = "mdio0_0_grp";
250 };
251
252 conf-mdio {
253 groups = "mdio0_0_grp";
254 slew-rate = <0>;
255 io-standard = <1>;
256 bias-disable;
257 };
258 };
259
260 pinctrl_gpio0_default: gpio0-default {
261 mux {
262 function = "gpio0";
263 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
264 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
265 "gpio0_13_grp", "gpio0_14_grp";
266 };
267
268 conf {
269 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
270 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
271 "gpio0_13_grp", "gpio0_14_grp";
272 slew-rate = <0>;
273 io-standard = <1>;
274 };
275
276 conf-pull-up {
277 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
278 bias-pull-up;
279 };
280
281 conf-pull-none {
282 pins = "MIO7", "MIO8";
283 bias-disable;
284 };
285 };
286
287 pinctrl_i2c0_default: i2c0-default {
288 mux {
289 groups = "i2c0_10_grp";
290 function = "i2c0";
291 };
292
293 conf {
294 groups = "i2c0_10_grp";
295 bias-pull-up;
296 slew-rate = <0>;
297 io-standard = <1>;
298 };
299 };
300
Chirag Parekh57bcc7f2016-12-27 22:07:58 +0530301 pinctrl_i2c0_gpio: i2c0-gpio {
302 mux {
303 groups = "gpio0_50_grp", "gpio0_51_grp";
304 function = "gpio0";
305 };
306
307 conf {
308 groups = "gpio0_50_grp", "gpio0_51_grp";
309 slew-rate = <0>;
310 io-standard = <1>;
311 };
312 };
313
Michal Simek999667c2015-07-22 11:12:10 +0200314 pinctrl_sdhci0_default: sdhci0-default {
315 mux {
316 groups = "sdio0_2_grp";
317 function = "sdio0";
318 };
319
320 conf {
321 groups = "sdio0_2_grp";
322 slew-rate = <0>;
323 io-standard = <1>;
324 bias-disable;
325 };
326
327 mux-cd {
328 groups = "gpio0_0_grp";
329 function = "sdio0_cd";
330 };
331
332 conf-cd {
333 groups = "gpio0_0_grp";
334 bias-high-impedance;
335 bias-pull-up;
336 slew-rate = <0>;
337 io-standard = <1>;
338 };
339
340 mux-wp {
341 groups = "gpio0_15_grp";
342 function = "sdio0_wp";
343 };
344
345 conf-wp {
346 groups = "gpio0_15_grp";
347 bias-high-impedance;
348 bias-pull-up;
349 slew-rate = <0>;
350 io-standard = <1>;
351 };
352 };
353
354 pinctrl_uart1_default: uart1-default {
355 mux {
356 groups = "uart1_10_grp";
357 function = "uart1";
358 };
359
360 conf {
361 groups = "uart1_10_grp";
362 slew-rate = <0>;
363 io-standard = <1>;
364 };
365
366 conf-rx {
367 pins = "MIO49";
368 bias-high-impedance;
369 };
370
371 conf-tx {
372 pins = "MIO48";
373 bias-disable;
374 };
375 };
376
377 pinctrl_usb0_default: usb0-default {
378 mux {
379 groups = "usb0_0_grp";
380 function = "usb0";
381 };
382
383 conf {
384 groups = "usb0_0_grp";
385 slew-rate = <0>;
386 io-standard = <1>;
387 };
388
389 conf-rx {
390 pins = "MIO29", "MIO31", "MIO36";
391 bias-high-impedance;
392 };
393
394 conf-tx {
395 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
396 "MIO35", "MIO37", "MIO38", "MIO39";
397 bias-disable;
398 };
399 };
400};
401
Michal Simeka95d54b2016-04-07 13:04:15 +0200402&qspi {
403 u-boot,dm-pre-reloc;
404 status = "okay";
405};
406
Michal Simek999667c2015-07-22 11:12:10 +0200407&sdhci0 {
Michal Simekd9ae52c2015-11-30 16:13:03 +0100408 u-boot,dm-pre-reloc;
Michal Simek999667c2015-07-22 11:12:10 +0200409 status = "okay";
410 pinctrl-names = "default";
411 pinctrl-0 = <&pinctrl_sdhci0_default>;
412};
413
414&uart1 {
Simon Glass035c6b22015-10-17 19:41:24 -0600415 u-boot,dm-pre-reloc;
Michal Simek999667c2015-07-22 11:12:10 +0200416 status = "okay";
417 pinctrl-names = "default";
418 pinctrl-0 = <&pinctrl_uart1_default>;
419};
420
421&usb0 {
422 status = "okay";
423 dr_mode = "host";
424 usb-phy = <&usb_phy0>;
425 pinctrl-names = "default";
426 pinctrl-0 = <&pinctrl_usb0_default>;
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +0530427};