blob: 574bc40b10e138a09200b8e3187d5295696b485f [file] [log] [blame]
Albert Aribaud39419ce2010-08-08 05:17:06 +05301/*
Albert ARIBAUD57b4bce2011-04-22 19:41:02 +02002 * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert Aribaud39419ce2010-08-08 05:17:06 +05303 *
Albert ARIBAUD57b4bce2011-04-22 19:41:02 +02004 * Written-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert Aribaud39419ce2010-08-08 05:17:06 +05305 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Albert Aribaud39419ce2010-08-08 05:17:06 +05307 */
8
9#include <common.h>
10#include <asm/io.h>
11
12#if defined(CONFIG_ORION5X)
13#include <asm/arch/orion5x.h>
14#elif defined(CONFIG_KIRKWOOD)
15#include <asm/arch/kirkwood.h>
16#endif
17
18/* SATA port registers */
19struct mvsata_port_registers {
Michael Walle70c55f52011-05-11 12:22:46 +000020 u32 reserved0[10];
21 u32 edma_cmd;
22 u32 reserved1[181];
Albert Aribaud39419ce2010-08-08 05:17:06 +053023 /* offset 0x300 : ATA Interface registers */
24 u32 sstatus;
25 u32 serror;
26 u32 scontrol;
27 u32 ltmode;
28 u32 phymode3;
29 u32 phymode4;
30 u32 reserved2[5];
31 u32 phymode1;
32 u32 phymode2;
33 u32 bist_cr;
34 u32 bist_dw1;
35 u32 bist_dw2;
36 u32 serrorintrmask;
37};
38
39/*
40 * Sanity checks:
41 * - to compile at all, we need CONFIG_SYS_ATA_BASE_ADDR.
42 * - for ide_preinit to make sense, we need at least one of
Gray Remlinc08349e2013-02-06 10:59:38 +000043 * CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE1_OFFSET;
44 * - for ide_preinit to be called, we need CONFIG_IDE_PREINIT.
Albert Aribaud39419ce2010-08-08 05:17:06 +053045 * Fail with an explanation message if these conditions are not met.
46 * This is particularly important for CONFIG_IDE_PREINIT, because
47 * its lack would not cause a build error.
48 */
49
50#if !defined(CONFIG_SYS_ATA_BASE_ADDR)
51#error CONFIG_SYS_ATA_BASE_ADDR must be defined
52#elif !defined(CONFIG_SYS_ATA_IDE0_OFFSET) \
53 && !defined(CONFIG_SYS_ATA_IDE1_OFFSET)
54#error CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE1_OFFSET \
55 must be defined
56#elif !defined(CONFIG_IDE_PREINIT)
57#error CONFIG_IDE_PREINIT must be defined
58#endif
59
60/*
61 * Masks and values for SControl DETection and Interface Power Management,
62 * and for SStatus DETection.
63 */
64
Michael Walle70c55f52011-05-11 12:22:46 +000065#define MVSATA_EDMA_CMD_ATA_RST 0x00000004
Albert Aribaud39419ce2010-08-08 05:17:06 +053066#define MVSATA_SCONTROL_DET_MASK 0x0000000F
67#define MVSATA_SCONTROL_DET_NONE 0x00000000
68#define MVSATA_SCONTROL_DET_INIT 0x00000001
69#define MVSATA_SCONTROL_IPM_MASK 0x00000F00
70#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300
71#define MVSATA_SCONTROL_MASK \
72 (MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK)
73#define MVSATA_PORT_INIT \
74 (MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
75#define MVSATA_PORT_USE \
76 (MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
77#define MVSATA_SSTATUS_DET_MASK 0x0000000F
78#define MVSATA_SSTATUS_DET_DEVCOMM 0x00000003
79
80/*
Albert Aribaudd3497132010-09-16 20:30:30 +053081 * Status codes to return to client callers. Currently, callers ignore
82 * exact value and only care for zero or nonzero, so no need to make this
83 * public, it is only #define'd for clarity.
84 * If/when standard negative codes are implemented in U-boot, then these
85 * #defines should be moved to, or replaced by ones from, the common list
86 * of status codes.
87 */
88
89#define MVSATA_STATUS_OK 0
90#define MVSATA_STATUS_TIMEOUT -1
91
92/*
Albert Aribaud39419ce2010-08-08 05:17:06 +053093 * Initialize one MVSATAHC port: set SControl's IPM to "always active"
94 * and DET to "reset", then wait for SStatus's DET to become "device and
95 * comm ok" (or time out after 50 us if no device), then set SControl's
96 * DET back to "no action".
97 */
98
Albert Aribaudd3497132010-09-16 20:30:30 +053099static int mvsata_ide_initialize_port(struct mvsata_port_registers *port)
Albert Aribaud39419ce2010-08-08 05:17:06 +0530100{
101 u32 control;
102 u32 status;
Albert Aribaudd3497132010-09-16 20:30:30 +0530103 u32 timeleft = 10000; /* wait at most 10 ms for SATA reset to complete */
Albert Aribaud39419ce2010-08-08 05:17:06 +0530104
Michael Walle70c55f52011-05-11 12:22:46 +0000105 /* Hard reset */
106 writel(MVSATA_EDMA_CMD_ATA_RST, &port->edma_cmd);
107 udelay(25); /* taken from original marvell port */
108 writel(0, &port->edma_cmd);
109
Albert Aribaudd3497132010-09-16 20:30:30 +0530110 /* Set control IPM to 3 (no low power) and DET to 1 (initialize) */
Albert Aribaud39419ce2010-08-08 05:17:06 +0530111 control = readl(&port->scontrol);
112 control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
113 writel(control, &port->scontrol);
Albert Aribaudd3497132010-09-16 20:30:30 +0530114 /* Toggle control DET back to 0 (normal operation) */
115 control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE;
116 writel(control, &port->scontrol);
117 /* wait for status DET to become 3 (device and communication OK) */
118 while (--timeleft) {
Albert Aribaud39419ce2010-08-08 05:17:06 +0530119 status = readl(&port->sstatus) & MVSATA_SSTATUS_DET_MASK;
120 if (status == MVSATA_SSTATUS_DET_DEVCOMM)
121 break;
122 udelay(1);
123 }
Albert Aribaudd3497132010-09-16 20:30:30 +0530124 /* return success or time-out error depending on time left */
125 if (!timeleft)
126 return MVSATA_STATUS_TIMEOUT;
127 return MVSATA_STATUS_OK;
Albert Aribaud39419ce2010-08-08 05:17:06 +0530128}
129
130/*
131 * ide_preinit() will be called by ide_init in cmd_ide.c and will
132 * reset the MVSTATHC ports needed by the board.
133 */
134
135int ide_preinit(void)
136{
Simon Guinot2cb4fad2011-11-21 19:25:46 +0530137 int ret = MVSATA_STATUS_TIMEOUT;
Albert Aribaudd3497132010-09-16 20:30:30 +0530138 int status;
Simon Guinot2cb4fad2011-11-21 19:25:46 +0530139
Albert Aribaud39419ce2010-08-08 05:17:06 +0530140 /* Enable ATA port 0 (could be SATA port 0 or 1) if declared */
141#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
Albert Aribaudd3497132010-09-16 20:30:30 +0530142 status = mvsata_ide_initialize_port(
Albert Aribaud39419ce2010-08-08 05:17:06 +0530143 (struct mvsata_port_registers *)
144 (CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET));
Simon Guinot2cb4fad2011-11-21 19:25:46 +0530145 if (status == MVSATA_STATUS_OK)
146 ret = MVSATA_STATUS_OK;
Albert Aribaud39419ce2010-08-08 05:17:06 +0530147#endif
148 /* Enable ATA port 1 (could be SATA port 0 or 1) if declared */
149#if defined(CONFIG_SYS_ATA_IDE1_OFFSET)
Albert Aribaudd3497132010-09-16 20:30:30 +0530150 status = mvsata_ide_initialize_port(
Albert Aribaud39419ce2010-08-08 05:17:06 +0530151 (struct mvsata_port_registers *)
152 (CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE1_OFFSET));
Simon Guinot2cb4fad2011-11-21 19:25:46 +0530153 if (status == MVSATA_STATUS_OK)
154 ret = MVSATA_STATUS_OK;
Albert Aribaud39419ce2010-08-08 05:17:06 +0530155#endif
Simon Guinot2cb4fad2011-11-21 19:25:46 +0530156 /* Return success if at least one port initialization succeeded */
157 return ret;
Albert Aribaud39419ce2010-08-08 05:17:06 +0530158}