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Bo Shen7ca6f362014-02-09 15:52:39 +08001/*
2 * Configuration settings for the SAMA5D3 Xplained board.
3 *
4 * Copyright (C) 2014 Atmel Corporation
5 * Bo Shen <voice.shen@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13#include <asm/hardware.h>
14
15#define CONFIG_SYS_TEXT_BASE 0x26f00000
16
17/* ARM asynchronous clock */
18#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
19#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
Bo Shen7ca6f362014-02-09 15:52:39 +080020
21#define CONFIG_AT91FAMILY
22#define CONFIG_ARCH_CPU_INIT
Bo Shencd23aac42014-03-19 14:48:45 +080023
24#ifndef CONFIG_SPL_BUILD
Bo Shen7ca6f362014-02-09 15:52:39 +080025#define CONFIG_SKIP_LOWLEVEL_INIT
Bo Shencd23aac42014-03-19 14:48:45 +080026#endif
27
Bo Shen7ca6f362014-02-09 15:52:39 +080028#define CONFIG_BOARD_EARLY_INIT_F
29#define CONFIG_DISPLAY_CPUINFO
30
31#define CONFIG_CMD_BOOTZ
32#define CONFIG_OF_LIBFDT /* Device Tree support */
33
34/* general purpose I/O */
35#define CONFIG_AT91_GPIO
36
37/* serial console */
38#define CONFIG_ATMEL_USART
39#define CONFIG_USART_BASE ATMEL_BASE_DBGU
40#define CONFIG_USART_ID ATMEL_ID_DBGU
41
42/*
43 * This needs to be defined for the OHCI code to work but it is defined as
44 * ATMEL_ID_UHPHS in the CPU specific header files.
45 */
46#define ATMEL_ID_UHP ATMEL_ID_UHPHS
47
48/*
49 * Specify the clock enable bit in the PMC_SCER register.
50 */
51#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
52
53#define CONFIG_BOOTDELAY 3
54
55/*
56 * BOOTP options
57 */
58#define CONFIG_BOOTP_BOOTFILESIZE
59#define CONFIG_BOOTP_BOOTPATH
60#define CONFIG_BOOTP_GATEWAY
61#define CONFIG_BOOTP_HOSTNAME
62
63/* No NOR flash */
64#define CONFIG_SYS_NO_FLASH
65
66/*
67 * Command line configuration.
68 */
69#include <config_cmd_default.h>
70#undef CONFIG_CMD_FPGA
71#undef CONFIG_CMD_IMI
72#undef CONFIG_CMD_LOADS
73#define CONFIG_CMD_PING
74#define CONFIG_CMD_DHCP
75
76/* SDRAM */
77#define CONFIG_NR_DRAM_BANKS 1
78#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
79#define CONFIG_SYS_SDRAM_SIZE 0x10000000
80
Bo Shencd23aac42014-03-19 14:48:45 +080081#ifdef CONFIG_SPL_BUILD
82#define CONFIG_SYS_INIT_SP_ADDR 0x310000
83#else
Bo Shen7ca6f362014-02-09 15:52:39 +080084#define CONFIG_SYS_INIT_SP_ADDR \
85 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shencd23aac42014-03-19 14:48:45 +080086#endif
Bo Shen7ca6f362014-02-09 15:52:39 +080087
88/* NAND flash */
89#define CONFIG_CMD_NAND
90
91#ifdef CONFIG_CMD_NAND
92#define CONFIG_NAND_ATMEL
93#define CONFIG_SYS_MAX_NAND_DEVICE 1
94#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
95/* our ALE is AD21 */
96#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
97/* our CLE is AD22 */
98#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
99#define CONFIG_SYS_NAND_ONFI_DETECTION
100/* PMECC & PMERRLOC */
101#define CONFIG_ATMEL_NAND_HWECC
102#define CONFIG_ATMEL_NAND_HW_PMECC
103#define CONFIG_PMECC_CAP 4
104#define CONFIG_PMECC_SECTOR_SIZE 512
105#define CONFIG_CMD_NAND_TRIMFFS
106#define CONFIG_CMD_MTDPARTS
107
108#define CONFIG_MTD_DEVICE
109#define CONFIG_MTD_PARTITIONS
110#define CONFIG_RBTREE
111#define CONFIG_LZO
112#define CONFIG_CMD_UBI
113#define CONFIG_CMD_UBIFS
114#endif
115
116/* Ethernet Hardware */
117#define CONFIG_MACB
118#define CONFIG_RMII
119#define CONFIG_NET_MULTI
120#define CONFIG_NET_RETRY_COUNT 20
121#define CONFIG_MACB_SEARCH_PHY
122#define CONFIG_RGMII
123#define CONFIG_CMD_MII
124#define CONFIG_PHYLIB
125
126/* MMC */
127#define CONFIG_CMD_MMC
128
129#ifdef CONFIG_CMD_MMC
130#define CONFIG_MMC
131#define CONFIG_GENERIC_MMC
132#define CONFIG_GENERIC_ATMEL_MCI
133#define CONFIG_ATMEL_MCI_8BIT
134#endif
135
136/* USB */
137#define CONFIG_CMD_USB
138
139#ifdef CONFIG_CMD_USB
140#define CONFIG_USB_ATMEL
141#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
142#define CONFIG_USB_OHCI_NEW
143#define CONFIG_SYS_USB_OHCI_CPU_INIT
144#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
145#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
146#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
147#define CONFIG_DOS_PARTITION
148#define CONFIG_USB_STORAGE
149#endif
150
151#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
152#define CONFIG_CMD_FAT
153#define CONFIG_FAT_WRITE
154#define CONFIG_CMD_EXT4
155#define CONFIG_CMD_EXT4_WRITE
156#endif
157
158#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
159
160#if CONFIG_SYS_USE_NANDFLASH
161/* bootstrap + u-boot + env in nandflash */
162#define CONFIG_ENV_IS_IN_NAND
163#define CONFIG_ENV_OFFSET 0xc0000
164#define CONFIG_ENV_OFFSET_REDUND 0x100000
165#define CONFIG_ENV_SIZE 0x20000
166#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
167 "nand read 0x22000000 0x200000 0x600000;" \
168 "bootz 0x22000000 - 0x21000000"
169#elif CONFIG_SYS_USE_MMC
170/* bootstrap + u-boot + env in sd card */
171#define CONFIG_ENV_IS_IN_MMC
172#define CONFIG_ENV_OFFSET 0x2000
173#define CONFIG_ENV_SIZE 0x1000
174#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d3_xplained.dtb; " \
175 "fatload mmc 0:1 0x22000000 zImage; " \
176 "bootz 0x22000000 - 0x21000000"
177#define CONFIG_SYS_MMC_ENV_DEV 0
178#else
179#define CONFIG_ENV_IS_NOWHERE
180#endif
181
182#ifdef CONFIG_SYS_USE_MMC
183#define CONFIG_BOOTARGS \
184 "console=ttyS0,115200 earlyprintk " \
185 "root=/dev/mmcblk0p2 rw rootwait"
186#else
187#define CONFIG_BOOTARGS \
188 "console=ttyS0,115200 earlyprintk " \
189 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
190 "256K(env),256k(evn_redundent),256k(spare)," \
191 "512k(dtb),6M(kernel)ro,-(rootfs) " \
192 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
193#endif
194
195#define CONFIG_BAUDRATE 115200
196
197#define CONFIG_SYS_PROMPT "U-Boot> "
198#define CONFIG_SYS_CBSIZE 256
199#define CONFIG_SYS_MAXARGS 16
200#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
201 sizeof(CONFIG_SYS_PROMPT) + 16)
202#define CONFIG_SYS_LONGHELP
203#define CONFIG_CMDLINE_EDITING
204#define CONFIG_AUTO_COMPLETE
205#define CONFIG_SYS_HUSH_PARSER
206
207/* Size of malloc() pool */
208#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
209
Bo Shencd23aac42014-03-19 14:48:45 +0800210/* SPL */
211#define CONFIG_SPL
212#define CONFIG_SPL_FRAMEWORK
213#define CONFIG_SPL_TEXT_BASE 0x300000
214#define CONFIG_SPL_MAX_SIZE 0x10000
215#define CONFIG_SPL_BSS_START_ADDR 0x20000000
216#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
217#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
218#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
219
220#define CONFIG_SPL_LIBCOMMON_SUPPORT
221#define CONFIG_SPL_LIBGENERIC_SUPPORT
222#define CONFIG_SPL_GPIO_SUPPORT
223#define CONFIG_SPL_SERIAL_SUPPORT
224
225#define CONFIG_SPL_BOARD_INIT
226#define CONFIG_SYS_MONITOR_LEN (512 << 10)
227
228#ifdef CONFIG_SYS_USE_MMC
229#define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds
230#define CONFIG_SPL_MMC_SUPPORT
231#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
232#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
233#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
234#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
235#define CONFIG_SPL_FAT_SUPPORT
236#define CONFIG_SPL_LIBDISK_SUPPORT
237
238#elif CONFIG_SYS_USE_NANDFLASH
239#define CONFIG_SPL_NAND_SUPPORT
240#define CONFIG_SPL_NAND_DRIVERS
241#define CONFIG_SPL_NAND_BASE
242#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
243#define CONFIG_SYS_NAND_5_ADDR_CYCLE
244#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
245#define CONFIG_SYS_NAND_PAGE_COUNT 64
246#define CONFIG_SYS_NAND_OOBSIZE 64
247#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
248#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
249
250#endif
251
Bo Shen7ca6f362014-02-09 15:52:39 +0800252#endif