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wdenk8b07a112004-07-10 21:45:47 +00001/*
2 * (C) Copyright 2002,2003,Motorola,Inc.
3 * Xianghua Xiao, X.Xiao@motorola.com.
4 *
5 * (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
6 * Added support for Wind River SBC8560 board
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27OUTPUT_ARCH(powerpc)
wdenk8b07a112004-07-10 21:45:47 +000028/* Do we need any of these for elf?
29 __DYNAMIC = 0; */
30SECTIONS
31{
32 .resetvec 0xFFFFFFFC :
33 {
34 *(.resetvec)
35 } = 0xffff
36
37 .bootpg 0xFFFFF000 :
38 {
39 cpu/mpc85xx/start.o (.bootpg)
wdenk8b07a112004-07-10 21:45:47 +000040 } = 0xffff
41
42 /* Read-only sections, merged into text segment: */
43 . = + SIZEOF_HEADERS;
44 .interp : { *(.interp) }
45 .hash : { *(.hash) }
46 .dynsym : { *(.dynsym) }
47 .dynstr : { *(.dynstr) }
48 .rel.text : { *(.rel.text) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020049 .rela.text : { *(.rela.text) }
wdenk8b07a112004-07-10 21:45:47 +000050 .rel.data : { *(.rel.data) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020051 .rela.data : { *(.rela.data) }
52 .rel.rodata : { *(.rel.rodata) }
53 .rela.rodata : { *(.rela.rodata) }
wdenk8b07a112004-07-10 21:45:47 +000054 .rel.got : { *(.rel.got) }
55 .rela.got : { *(.rela.got) }
56 .rel.ctors : { *(.rel.ctors) }
57 .rela.ctors : { *(.rela.ctors) }
58 .rel.dtors : { *(.rel.dtors) }
59 .rela.dtors : { *(.rela.dtors) }
60 .rel.bss : { *(.rel.bss) }
61 .rela.bss : { *(.rela.bss) }
62 .rel.plt : { *(.rel.plt) }
63 .rela.plt : { *(.rela.plt) }
64 .init : { *(.init) }
65 .plt : { *(.plt) }
66 .text :
67 {
68 cpu/mpc85xx/start.o (.text)
wdenk8b07a112004-07-10 21:45:47 +000069 cpu/mpc85xx/commproc.o (.text)
70 cpu/mpc85xx/traps.o (.text)
71 cpu/mpc85xx/interrupts.o (.text)
72 cpu/mpc85xx/serial_scc.o (.text)
73 cpu/mpc85xx/ether_fcc.o (.text)
74 cpu/mpc85xx/cpu_init.o (.text)
75 cpu/mpc85xx/cpu.o (.text)
76 cpu/mpc85xx/speed.o (.text)
wdenk8b07a112004-07-10 21:45:47 +000077 cpu/mpc85xx/spd_sdram.o (.text)
78 common/dlmalloc.o (.text)
79 lib_generic/crc32.o (.text)
80 lib_ppc/extable.o (.text)
81 lib_generic/zlib.o (.text)
82 *(.text)
83 *(.fixup)
84 *(.got1)
85 }
86 _etext = .;
87 PROVIDE (etext = .);
88 .rodata :
89 {
90 *(.rodata)
91 *(.rodata1)
92 *(.rodata.str1.4)
Wolfgang Denk74812662005-12-12 16:06:05 +010093 *(.eh_frame)
wdenk8b07a112004-07-10 21:45:47 +000094 }
95 .fini : { *(.fini) } =0
96 .ctors : { *(.ctors) }
97 .dtors : { *(.dtors) }
98
99 /* Read-write section, merged into data segment: */
100 . = (. + 0x00FF) & 0xFFFFFF00;
101 _erotext = .;
102 PROVIDE (erotext = .);
103 .reloc :
104 {
105 *(.got)
106 _GOT2_TABLE_ = .;
107 *(.got2)
108 _FIXUP_TABLE_ = .;
109 *(.fixup)
110 }
111 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
112 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
113
114 .data :
115 {
116 *(.data)
117 *(.data1)
118 *(.sdata)
119 *(.sdata2)
120 *(.dynamic)
121 CONSTRUCTORS
122 }
123 _edata = .;
124 PROVIDE (edata = .);
125
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200126 . = .;
wdenk8b07a112004-07-10 21:45:47 +0000127 __u_boot_cmd_start = .;
128 .u_boot_cmd : { *(.u_boot_cmd) }
129 __u_boot_cmd_end = .;
130
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200131 . = .;
wdenk8b07a112004-07-10 21:45:47 +0000132 __start___ex_table = .;
133 __ex_table : { *(__ex_table) }
134 __stop___ex_table = .;
135
136 . = ALIGN(256);
137 __init_begin = .;
138 .text.init : { *(.text.init) }
139 .data.init : { *(.data.init) }
140 . = ALIGN(256);
141 __init_end = .;
142
143 __bss_start = .;
Wolfgang Denk64134f02008-01-12 20:31:39 +0100144 .bss (NOLOAD) :
wdenk8b07a112004-07-10 21:45:47 +0000145 {
146 *(.sbss) *(.scommon)
147 *(.dynbss)
148 *(.bss)
149 *(COMMON)
150 }
151 _end = . ;
152 PROVIDE (end = .);
153}