blob: e6886cf7f6f86c8ec88d2e408b9e3d394683ce5f [file] [log] [blame]
Wolfgang Denk32cb2c72006-07-21 11:31:42 +02001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
Detlev Zundel792a09e2009-05-13 10:54:10 +02005 * Gary Jennejohn <garyj@denx.de>
Wolfgang Denk32cb2c72006-07-21 11:31:42 +02006 * David Mueller <d.mueller@elsoft.ch>
7 *
8 * Modified for the friendly-arm SBC-2410X by
9 * (C) Copyright 2005
10 * JinHua Luo, GuangDong Linux Center, <luo.jinhua@gd-linux.com>
11 *
12 * Configuation settings for the friendly-arm SBC-2410X board.
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33#ifndef __CONFIG_H
34#define __CONFIG_H
35
36/*
37 * If we are developing, we might want to start armboot from ram
38 * so we MUST NOT initialize critical regs like mem-timing ...
39 */
40#undef CONFIG_SKIP_LOWLEVEL_INIT /* undef for developing */
41
42/*
43 * High Level Configuration Options
44 * (easy to change)
45 */
46#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
47#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
48#define CONFIG_SBC2410X 1 /* on a friendly-arm SBC-2410X Board */
49
50/* input clock of PLL */
51#define CONFIG_SYS_CLK_FREQ 12000000/* the SBC2410X has 12MHz input clock */
52
53
54#define USE_920T_MMU 1
55#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
56
57/*
58 * Size of malloc() pool
59 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
61#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020062
63/*
64 * Hardware drivers
65 */
Ben Warrenb1c0eaa2009-08-25 13:09:37 -070066#define CONFIG_NET_MULTI
67#define CONFIG_CS8900 /* we have a CS8900 on-board */
68#define CONFIG_CS8900_BASE 0x19000300
69#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020070
71/*
72 * select serial console configuration
73 */
Jean-Christophe PLAGNIOL-VILLARD300f99f2009-03-30 18:58:39 +020074#define CONFIG_S3C24X0_SERIAL
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020075#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */
76
77/************************************************************
78 * RTC
79 ************************************************************/
80#define CONFIG_RTC_S3C24X0 1
81
82/* allow to overwrite serial and ethaddr */
83#define CONFIG_ENV_OVERWRITE
84
85#define CONFIG_BAUDRATE 115200
86
Wolfgang Denk32cb2c72006-07-21 11:31:42 +020087
Jon Loeliger866e3082007-07-04 22:30:58 -050088/*
Jon Loeliger079a1362007-07-10 10:12:10 -050089 * BOOTP options
90 */
91#define CONFIG_BOOTP_BOOTFILESIZE
92#define CONFIG_BOOTP_BOOTPATH
93#define CONFIG_BOOTP_GATEWAY
94#define CONFIG_BOOTP_HOSTNAME
95
96
97/*
Jon Loeliger866e3082007-07-04 22:30:58 -050098 * Command line configuration.
99 */
100#include <config_cmd_default.h>
101
102#define CONFIG_CMD_ASKENV
103#define CONFIG_CMD_CACHE
104#define CONFIG_CMD_DATE
105#define CONFIG_CMD_DHCP
106#define CONFIG_CMD_ELF
107#define CONFIG_CMD_PING
Jon Loeliger866e3082007-07-04 22:30:58 -0500108
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200109
110#define CONFIG_BOOTDELAY 3
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200111#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs " \
112 "nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv " \
113 "ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off"
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200114#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
115#define CONFIG_NETMASK 255.255.255.0
116#define CONFIG_IPADDR 192.168.0.69
117#define CONFIG_SERVERIP 192.168.0.1
118/*#define CONFIG_BOOTFILE "elinos-lart" */
119#define CONFIG_BOOTCOMMAND "dhcp; bootm"
120
Jon Loeliger866e3082007-07-04 22:30:58 -0500121#if defined(CONFIG_CMD_KGDB)
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200122#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
123/* what's this ? it's not used anywhere */
124#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
125#endif
126
127/*
128 * Miscellaneous configurable options
129 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130#define CONFIG_SYS_LONGHELP /* undef to save memory */
131#define CONFIG_SYS_PROMPT "[ ~ljh@GDLC ]# " /* Monitor Command Prompt */
132#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
133#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
134#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
135#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200136
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
138#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200139
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200141
kevin.morfitt@fearnside-systems.co.ukcd856622009-09-06 00:33:13 +0900142#define CONFIG_SYS_HZ 1000
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200143
144/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200146
147/*-----------------------------------------------------------------------
148 * Stack sizes
149 *
150 * The stack sizes are set up in start.S using the settings below
151 */
152#define CONFIG_STACKSIZE (128*1024) /* regular stack */
153#ifdef CONFIG_USE_IRQ
154#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
155#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
156#endif
157
158/*-----------------------------------------------------------------------
159 * Physical Memory Map
160 */
161#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
162#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
163#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
164
165#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
166
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200168
169/*-----------------------------------------------------------------------
170 * FLASH and environment organization
171 */
172/* #define CONFIG_AMD_LV400 1 /\* uncomment this if you have a LV400 flash *\/ */
173
174#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
175
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200177
178#ifdef CONFIG_AMD_LV800
179#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
181#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200182#endif
183
184#ifdef CONFIG_AMD_LV400
185#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
187#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200188#endif
189
190/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
192#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200193
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200194#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200195#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200196
197/*-----------------------------------------------------------------------
198 * NAND flash settings
199 */
Jon Loeliger866e3082007-07-04 22:30:58 -0500200#if defined(CONFIG_CMD_NAND)
Jean-Christophe PLAGNIOL-VILLARDb3f66b02009-03-30 18:58:40 +0200201#define CONFIG_NAND_S3C2410
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
Jon Loeliger866e3082007-07-04 22:30:58 -0500203#endif /* CONFIG_CMD_NAND */
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200204
205#define CONFIG_SETUP_MEMORY_TAGS
206#define CONFIG_INITRD_TAG
207#define CONFIG_CMDLINE_TAG
208
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#define CONFIG_SYS_HUSH_PARSER
210#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Wolfgang Denk32cb2c72006-07-21 11:31:42 +0200211
212#define CONFIG_CMDLINE_EDITING
213
214#ifdef CONFIG_CMDLINE_EDITING
215#undef CONFIG_AUTO_COMPLETE
216#else
217#define CONFIG_AUTO_COMPLETE
218#endif
219
220#endif /* __CONFIG_H */