Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef _TIMER_H_ |
| 8 | #define _TIMER_H_ |
| 9 | |
| 10 | /* |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 11 | * timer_conv_64 - convert 32-bit counter value to 64-bit |
| 12 | * |
| 13 | * @count: 32-bit counter value |
| 14 | * @return: 64-bit counter value |
| 15 | */ |
| 16 | u64 timer_conv_64(u32 count); |
| 17 | |
| 18 | /* |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 19 | * Get the current timer count |
| 20 | * |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 21 | * @dev: The timer device |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 22 | * @count: pointer that returns the current timer count |
| 23 | * @return: 0 if OK, -ve on error |
| 24 | */ |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 25 | int timer_get_count(struct udevice *dev, u64 *count); |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 26 | |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 27 | /* |
| 28 | * Get the timer input clock frequency |
| 29 | * |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 30 | * @dev: The timer device |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 31 | * @return: the timer input clock frequency |
| 32 | */ |
| 33 | unsigned long timer_get_rate(struct udevice *dev); |
| 34 | |
| 35 | /* |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 36 | * struct timer_ops - Driver model timer operations |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 37 | * |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 38 | * The uclass interface is implemented by all timer devices which use |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 39 | * driver model. |
| 40 | */ |
| 41 | struct timer_ops { |
| 42 | /* |
| 43 | * Get the current timer count |
| 44 | * |
Bin Meng | 435ae76 | 2015-11-13 00:11:14 -0800 | [diff] [blame] | 45 | * @dev: The timer device |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 46 | * @count: pointer that returns the current 64-bit timer count |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 47 | * @return: 0 if OK, -ve on error |
| 48 | */ |
Bin Meng | 9ca07eb | 2015-11-24 13:31:17 -0700 | [diff] [blame] | 49 | int (*get_count)(struct udevice *dev, u64 *count); |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 50 | }; |
| 51 | |
| 52 | /* |
| 53 | * struct timer_dev_priv - information about a device used by the uclass |
| 54 | * |
| 55 | * @clock_rate: the timer input clock frequency |
| 56 | */ |
| 57 | struct timer_dev_priv { |
| 58 | unsigned long clock_rate; |
| 59 | }; |
| 60 | |
| 61 | #endif /* _TIMER_H_ */ |