| Valentine Barshak | ed2f65f | 2019-04-23 23:44:57 +0300 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * include/configs/v3hsk.h |
| 4 | * This file is V3HSK board configuration. |
| 5 | * |
| 6 | * Copyright (C) 2019 Renesas Electronics Corporation |
| 7 | * Copyright (C) 2019 Cogent Embedded, Inc. |
| 8 | */ |
| 9 | |
| 10 | #ifndef __V3HSK_H |
| 11 | #define __V3HSK_H |
| 12 | |
| 13 | #include "rcar-gen3-common.h" |
| 14 | |
| 15 | /* Environment compatibility */ |
| 16 | |
| 17 | /* SH Ether */ |
| 18 | #define CFG_SH_ETHER_USE_PORT 0 |
| 19 | #define CFG_SH_ETHER_PHY_ADDR 0x0 |
| 20 | #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII_ID |
| 21 | #define CFG_SH_ETHER_CACHE_WRITEBACK |
| 22 | #define CFG_SH_ETHER_CACHE_INVALIDATE |
| 23 | #define CFG_SH_ETHER_ALIGNE_SIZE 64 |
| 24 | |
| 25 | /* Board Clock */ |
| 26 | /* XTAL_CLK : 33.33MHz */ |
| 27 | |
| 28 | #endif /* __V3HSK_H */ |