blob: 0c44a97f64b8a576ee7e2ea216660b604db1625f [file] [log] [blame]
Wenyou Yangce4054b2017-09-13 14:58:54 +08001/*
2 * sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SOM1
3 *
4 * Copyright (C) 2017 Microchip Corporation
5 * Wenyou Yang <wenyou.yang@microchip.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46#include "sama5d2.dtsi"
47#include "sama5d2-pinfunc.h"
48/ {
49 model = "Atmel SAMA5D27 SOM1 EK";
50 compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5";
51
52 memory {
53 reg = <0x20000000 0x8000000>;
54 };
55
56 aliases {
57 spi0 = &qspi1;
58 u-boot,dm-pre-reloc;
59 };
60
61 ahb {
62 apb {
63 qspi1: spi@f0024000 {
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
66 status = "okay";
67 u-boot,dm-pre-reloc;
68
69 spi_flash@0 {
70 compatible = "spi-flash";
71 reg = <0>;
72 spi-max-frequency = <50000000>;
73 spi-rx-bus-width = <4>;
74 spi-tx-bus-width = <4>;
75 u-boot,dm-pre-reloc;
76 };
77 };
78
79 macb0: ethernet@f8008000 {
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
82 phy-mode = "rmii";
83 status = "okay";
84
85 ethernet-phy@1 {
86 reg = <0x1>;
87 };
88 };
89
90 i2c0: i2c@f8028000 {
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_i2c0_default>;
93 status = "okay";
94
95 i2c_eeprom: i2c_eeprom@50 {
96 compatible = "microchip,24aa02e48";
97 reg = <0x50>;
98 };
99 };
100
101 i2c1: i2c@fc028000 {
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_i2c1_default>;
104 status = "okay";
105 };
106
107 pioA: gpio@fc038000 {
108 pinctrl {
109 pinctrl_i2c0_default: i2c0_default {
110 pinmux = <PIN_PD21__TWD0>,
111 <PIN_PD22__TWCK0>;
112 bias-disable;
113 };
114
115 pinctrl_i2c1_default: i2c1_default {
116 pinmux = <PIN_PD4__TWD1>,
117 <PIN_PD5__TWCK1>;
118 bias-disable;
119 };
120
121 pinctrl_macb0_phy_irq: macb0_phy_irq {
122 pinmux = <PIN_PD31__GPIO>;
123 bias-disable;
124 };
125
126 pinctrl_macb0_rmii: macb0_rmii {
127 pinmux = <PIN_PD9__GTXCK>,
128 <PIN_PD10__GTXEN>,
129 <PIN_PD11__GRXDV>,
130 <PIN_PD12__GRXER>,
131 <PIN_PD13__GRX0>,
132 <PIN_PD14__GRX1>,
133 <PIN_PD15__GTX0>,
134 <PIN_PD16__GTX1>,
135 <PIN_PD17__GMDC>,
136 <PIN_PD18__GMDIO>;
137 bias-disable;
138 };
139
140 pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
141 pinmux = <PIN_PB5__QSPI1_SCK>,
142 <PIN_PB6__QSPI1_CS>;
143 bias-disable;
144 u-boot,dm-pre-reloc;
145 };
146
147 pinctrl_qspi1_dat_default: qspi1_dat_default {
148 pinmux = <PIN_PB7__QSPI1_IO0>,
149 <PIN_PB8__QSPI1_IO1>,
150 <PIN_PB9__QSPI1_IO2>,
151 <PIN_PB10__QSPI1_IO3>;
152 bias-pull-up;
153 u-boot,dm-pre-reloc;
154 };
155 };
156 };
157 };
158 };
159};