Blame - include/configs/malta.h - platform/external/u-boot

blob: e15c6bba7544da8f9452698a1dc2ee488a6cc654 [file] [log] [blame]

Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	1	/*
				2	* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
				3	*
Tom Rini	0b17998	2013-07-24 09:34:30 -0400	[diff] [blame]	4	* SPDX-License-Identifier: GPL-2.0
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	5	*/
				6
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	7	#ifndef _MALTA_CONFIG_H
				8	#define _MALTA_CONFIG_H
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	9
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	10	/*
				11	* System configuration
				12	*/
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	13	#define CONFIG_MALTA
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	14
Gabor Juhos	ab41305	2013-10-24 14:32:00 +0200	[diff] [blame]	15	#define CONFIG_MEMSIZE_IN_BYTES
				16
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	17	#define CONFIG_PCI_GT64120
Paul Burton	baf37f0	2013-11-08 11:18:50 +0000	[diff] [blame]	18	#define CONFIG_PCI_MSC01
Gabor Juhos	f195749	2013-05-22 03:57:44 +0000	[diff] [blame]	19	#define CONFIG_PCNET
Paul Burton	e0878af	2013-11-08 11:18:52 +0000	[diff] [blame]	20	#define CONFIG_PCNET_79C973
				21	#define PCNET_HAS_PROM
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	22
Paul Burton	3ced12a	2013-11-08 11:18:55 +0000	[diff] [blame]	23	#define CONFIG_MISC_INIT_R
				24	#define CONFIG_RTC_MC146818
				25	#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
				26
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	27	/*
				28	* CPU Configuration
				29	*/
				30	#define CONFIG_SYS_MHZ 250 /* arbitrary value */
				31	#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	32
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	33	/*
				34	* Memory map
				35	*/
Gabor Juhos	10473d0	2013-11-12 16:47:32 +0100	[diff] [blame]	36	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	37
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	38	#ifdef CONFIG_64BIT
				39	# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
				40	#else
				41	# define CONFIG_SYS_SDRAM_BASE 0x80000000
				42	#endif
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	43	#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
				44
				45	#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
				46
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	47	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
				48	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
				49	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	50
				51	#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
				52	#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton	67d4752	2013-11-26 17:45:28 +0000	[diff] [blame]	53	#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	54
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	55	#define CONFIG_AUTO_COMPLETE
				56	#define CONFIG_CMDLINE_EDITING
				57
				58	/*
				59	* Serial driver
				60	*/
Paul Burton	2e7eb12	2016-05-17 07:43:27 +0100	[diff] [blame]	61	#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	62
				63	/*
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	64	* Flash configuration
				65	*/
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	66	#ifdef CONFIG_64BIT
				67	# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
				68	#else
				69	# define CONFIG_SYS_FLASH_BASE 0xbe000000
				70	#endif
Gabor Juhos	52caee0	2013-05-22 03:57:39 +0000	[diff] [blame]	71	#define CONFIG_SYS_MAX_FLASH_BANKS 1
				72	#define CONFIG_SYS_MAX_FLASH_SECT 128
				73	#define CONFIG_SYS_FLASH_CFI
				74	#define CONFIG_FLASH_CFI_DRIVER
				75	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	76
				77	/*
Paul Burton	fba6f45	2013-11-08 11:18:56 +0000	[diff] [blame]	78	* Environment
				79	*/
Paul Burton	fba6f45	2013-11-08 11:18:56 +0000	[diff] [blame]	80	#define CONFIG_ENV_SECT_SIZE 0x20000
				81	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
				82	#define CONFIG_ENV_ADDR \
				83	(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
				84
				85	/*
Paul Burton	ba21a45	2015-01-29 10:38:20 +0000	[diff] [blame]	86	* IDE/ATA
				87	*/
				88	#define CONFIG_SYS_IDE_MAXBUS 1
				89	#define CONFIG_SYS_IDE_MAXDEVICE 2
				90	#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
				91	#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
				92	#define CONFIG_SYS_ATA_DATA_OFFSET 0
				93	#define CONFIG_SYS_ATA_REG_OFFSET 0
				94
				95	/*
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	96	* Commands
				97	*/
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	98
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	99	#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
				100
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	101	#endif /* _MALTA_CONFIG_H */