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Bartlomiej Siekafa1df302007-07-11 20:11:07 +02001/*
2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 */
30#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
31#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +020032#define CONFIG_CM5200 1 /* ... on CM5200 platform */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020033
Becky Bruce31d82672008-05-08 19:02:12 -050034#define CONFIG_HIGH_BATS 1 /* High BATs supported */
35
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020036/*
37 * Supported commands
38 */
Wolfgang Denkafaac862007-08-12 14:27:39 +020039#include <config_cmd_default.h>
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020040
Wolfgang Denkafaac862007-08-12 14:27:39 +020041#define CONFIG_CMD_ASKENV
42#define CONFIG_CMD_BSP
43#define CONFIG_CMD_DATE
44#define CONFIG_CMD_DHCP
45#define CONFIG_CMD_DIAG
46#define CONFIG_CMD_FAT
47#define CONFIG_CMD_I2C
48#define CONFIG_CMD_JFFS2
49#define CONFIG_CMD_MII
50#define CONFIG_CMD_NFS
51#define CONFIG_CMD_PING
52#define CONFIG_CMD_REGINFO
53#define CONFIG_CMD_SNTP
54#define CONFIG_CMD_USB
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020055
56/*
57 * Serial console configuration
58 */
59#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
60#define CONFIG_BAUDRATE 57600 /* ... at 57600 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +020062#define CONFIG_SILENT_CONSOLE 1 /* needed to silence i2c_init() */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020063
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020064/*
65 * Ethernet configuration
66 */
67#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -080068#define CONFIG_MPC5xxx_FEC_MII100
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020069#define CONFIG_PHY_ADDR 0x00
70#define CONFIG_ENV_OVERWRITE 1 /* allow overwriting of ethaddr */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071/* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020072#define CONFIG_MISC_INIT_R 1
73#define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
74
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020075/*
76 * POST support
77 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020079#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
80/* List of I2C addresses to be verified by POST */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#define I2C_ADDR_LIST { CONFIG_SYS_I2C_SLAVE, CONFIG_SYS_I2C_IO, CONFIG_SYS_I2C_EEPROM }
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020082
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020083/* display image timestamps */
84#define CONFIG_TIMESTAMP 1
85
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020086/*
87 * Autobooting
88 */
89#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
90#define CONFIG_PREBOOT "echo;" \
91 "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
92 "echo"
93#undef CONFIG_BOOTARGS
94
95/*
96 * Default environment settings
97 */
98#define CONFIG_EXTRA_ENV_SETTINGS \
99 "netdev=eth0\0" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200100 "netmask=255.255.0.0\0" \
101 "ipaddr=192.168.160.33\0" \
102 "serverip=192.168.1.1\0" \
103 "gatewayip=192.168.1.1\0" \
104 "console=ttyPSC0\0" \
105 "u-boot_addr=100000\0" \
106 "kernel_addr=200000\0" \
107 "kernel_addr_flash=fc0c0000\0" \
108 "fdt_addr=400000\0" \
109 "fdt_addr_flash=fc0a0000\0" \
110 "ramdisk_addr=500000\0" \
111 "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200112 "u-boot=/tftpboot/cm5200/u-boot.bin\0" \
113 "bootfile_fdt=/tftpboot/cm5200/uImage\0" \
114 "fdt_file=/tftpboot/cm5200/cm5200.dtb\0" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200115 "load=tftp ${u-boot_addr} ${u-boot}\0" \
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200116 "update=prot off fc000000 +${filesize}; " \
117 "era fc000000 +${filesize}; " \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200118 "cp.b ${u-boot_addr} fc000000 ${filesize}; " \
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200119 "prot on fc000000 +${filesize}\0" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200120 "nfsargs=setenv bootargs root=/dev/nfs rw " \
121 "nfsroot=${serverip}:${rootpath}\0" \
122 "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0" \
123 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
124 "addinit=setenv bootargs ${bootargs} init=/linuxrc\0" \
125 "addcons=setenv bootargs ${bootargs} " \
126 "console=${console},${baudrate}\0" \
127 "addip=setenv bootargs ${bootargs} " \
128 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
129 "${netmask}:${hostname}:${netdev}:off panic=1\0" \
130 "flash_flash=run flashargs addinit addip addcons;" \
131 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0" \
132 "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; " \
133 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip " \
134 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0" \
135 ""
136#define CONFIG_BOOTCOMMAND "run flash_flash"
137
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200138/*
139 * Low level configuration
140 */
141
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200142/*
143 * Clock configuration
144 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
146#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200147
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200148/*
149 * Memory map
150 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151#define CONFIG_SYS_MBAR 0xF0000000
152#define CONFIG_SYS_SDRAM_BASE 0x00000000
153#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200154
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_LOWBOOT 1
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200156
157/* Use ON-Chip SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200159#ifdef CONFIG_POST
160/* preserve space for the post_word at end of on-chip SRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200162#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200164#endif
165
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */
167#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200168#define CONFIG_BOARD_TYPES 1 /* we use board_type */
169
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200171
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
173#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
174#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
175#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200176
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200177/*
178 * Flash configuration
179 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200181#define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_FLASH_BASE 0xfc000000
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200183/* we need these despite using CFI */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
185#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
186#define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200187
188
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
190#define CONFIG_SYS_RAMBOOT 1
191#undef CONFIG_SYS_LOWBOOT
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200192#endif
193
194
195/*
196 * Chip selects configuration
197 */
198/* Boot Chipselect */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
200#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
201#define CONFIG_SYS_BOOTCS_CFG 0x00087D31 /* for pci_clk = 33 MHz */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200202/* use board_early_init_r to enable flash write in CS_BOOT */
203#define CONFIG_BOARD_EARLY_INIT_R
204
205/* Flash memory addressing */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
207#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200208
209/* No burst, dead cycle = 1 for CS0 (Flash) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_CS_BURST 0x00000000
211#define CONFIG_SYS_CS_DEADCYCLE 0x00000001
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200212
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200213/*
214 * SDRAM configuration
215 * settings for k4s561632E-xx75, assuming XLB = 132 MHz
216 */
217#define SDRAM_MODE 0x00CD0000 /* CASL 3, burst length 8 */
218#define SDRAM_CONTROL 0x514F0000
219#define SDRAM_CONFIG1 0xE2333900
220#define SDRAM_CONFIG2 0x8EE70000
221
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200222/*
223 * MTD configuration
224 */
Stefan Roese68d7d652009-03-19 13:30:36 +0100225#define CONFIG_CMD_MTDPARTS 1
Stefan Roese942556a2009-05-12 14:32:58 +0200226#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
227#define CONFIG_FLASH_CFI_MTD
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200228#define MTDIDS_DEFAULT "nor0=cm5200-0"
229#define MTDPARTS_DEFAULT "mtdparts=cm5200-0:" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200230 "384k(uboot),128k(env)," \
231 "128k(redund_env),128k(dtb)," \
232 "2m(kernel),27904k(rootfs)," \
233 "-(config)"
234
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200235/*
236 * I2C configuration
237 */
238#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200239#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 */
240#define CONFIG_SYS_I2C_SPEED 40000 /* 40 kHz */
241#define CONFIG_SYS_I2C_SLAVE 0x0
242#define CONFIG_SYS_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
243#define CONFIG_SYS_I2C_EEPROM 0x53 /* I2C EEPROM device address */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200244
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200245/*
246 * RTC configuration
247 */
248#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
249
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200250/*
251 * USB configuration
252 */
253#define CONFIG_USB_OHCI 1
254#define CONFIG_USB_STORAGE 1
255#define CONFIG_USB_CLOCK 0x0001BBBB
256#define CONFIG_USB_CONFIG 0x00001000
257/* Partitions (for USB) */
258#define CONFIG_MAC_PARTITION 1
259#define CONFIG_DOS_PARTITION 1
260#define CONFIG_ISO_PARTITION 1
261
262/*
263 * Invoke our last_stage_init function - needed by fwupdate
264 */
265#define CONFIG_LAST_STAGE_INIT 1
266
267/*
268 * Environment settings
269 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200270#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200271#define CONFIG_ENV_SIZE 0x10000
272#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200273#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200274/* Configuration of redundant environment */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200275#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
276#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200277
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200278/*
279 * Pin multiplexing configuration
280 */
281
282/*
283 * CS1/GPIO_WKUP_6: GPIO (default)
284 * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
285 * IRDA/PSC6: UART
286 * Ether: Ethernet 100Mbit with MD
287 * PCI_DIS: PCI controller disabled
288 * USB: USB
289 * PSC3: SPI with UART3
290 * PSC2: UART
291 * PSC1: UART
292 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200293#define CONFIG_SYS_GPS_PORT_CONFIG 0x10559C44
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200294
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200295/*
296 * Miscellaneous configurable options
297 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200298#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
299#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
300#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
301#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
302#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
303#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200304
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200305#define CONFIG_SYS_ALT_MEMTEST 1
306#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
307#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 .. 63 MiB in SDRAM */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200308
309#define CONFIG_LOOPW 1
310
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200311#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
312#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200313
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200314/*
315 * Various low-level settings
316 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200317#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
318#define CONFIG_SYS_HID0_FINAL HID0_ICE
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200319
320#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
321#define BOOTFLAG_WARM 0x02 /* Software reboot */
322
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200323#define CONFIG_SYS_XLB_PIPELINING 1 /* enable transaction pipeling */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200324
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200325/*
326 * Cache Configuration
327 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200328#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Wolfgang Denkafaac862007-08-12 14:27:39 +0200329#ifdef CONFIG_CMD_KGDB
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200330#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200331#endif
332
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200333/*
334 * Flat Device Tree support
335 */
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200336#define CONFIG_OF_LIBFDT 1
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200337#define CONFIG_OF_BOARD_SETUP 1
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200338#define OF_CPU "PowerPC,5200@0"
339#define OF_SOC "soc5200@f0000000"
340#define OF_TBCLK (bd->bi_busfreq / 4)
341#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
342
343#endif /* __CONFIG_H */