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Albin Tonnerre2dc851e2009-08-20 16:04:49 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Copyright (C) 2009
7 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
8 *
9 * Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#ifndef __CONFIG_H
31#define __CONFIG_H
32
Jens Scharsig425de622010-02-03 22:45:42 +010033#define CONFIG_AT91_LEGACY
34
Albin Tonnerre2dc851e2009-08-20 16:04:49 +020035#if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9260_EEPROM)
36#define CONFIG_TNY_A9260
37#elif defined(CONFIG_TNY_A9G20_NANDFLASH) || defined(CONFIG_TNY_A9G20_EEPROM)
38#define CONFIG_TNY_A9G20
39#endif
40
41#ifdef CONFIG_TNY_A9260
42#define CONFIG_AT91SAM9260
43#else
44#define CONFIG_AT91SAM9G20
45#endif
46
47#if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH)
48#define CONFIG_ENV_IS_IN_NAND
49#else
50#define CONFIG_ENV_IS_IN_EEPROM
51#endif
52
53/* ARM asynchronous clock */
Achim Ehrlich7c966a82010-02-24 10:29:16 +010054#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
Albin Tonnerre2dc851e2009-08-20 16:04:49 +020055#define CONFIG_SYS_HZ 1000
56
57#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
58#define CONFIG_ARCH_CPU_INIT
59#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
60
61#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
62#define CONFIG_SETUP_MEMORY_TAGS 1
63#define CONFIG_INITRD_TAG 1
64
65#define CONFIG_SKIP_LOWLEVEL_INIT
66#define CONFIG_SKIP_RELOCATE_UBOOT
67
68/*
69 * Hardware drivers
70 */
Jens Scharsigea8fbba2010-02-03 22:46:16 +010071#define CONFIG_AT91_GPIO 1
Albin Tonnerre2dc851e2009-08-20 16:04:49 +020072#define CONFIG_ATMEL_USART 1
73#undef CONFIG_USART0
74#undef CONFIG_USART1
75#undef CONFIG_USART2
76#define CONFIG_USART3 1 /* USART 3 is DBGU */
77
78#define CONFIG_BOOTDELAY 3
79
80/*
81 * Command line configuration.
82 */
83#include <config_cmd_default.h>
84#undef CONFIG_CMD_BDI
85#undef CONFIG_CMD_FPGA
86#undef CONFIG_CMD_IMI
87#undef CONFIG_CMD_IMLS
88#undef CONFIG_CMD_LOADS
89#undef CONFIG_CMD_NET
90#undef CONFIG_CMD_SOURCE
91#undef CONFIG_CMD_USB
92
93/* SDRAM */
94#define CONFIG_NR_DRAM_BANKS 1
95#define PHYS_SDRAM 0x20000000
96#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
97
98/* SPI EEPROM */
99#define CONFIG_SPI
100#define CONFIG_CMD_SPI
101#define CONFIG_ATMEL_SPI
102#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
103
104#define CONFIG_CMD_EEPROM
105#define CONFIG_SPI_M95XXX
106#define CONFIG_SYS_EEPROM_SIZE 0x10000
107#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
108
109/* NAND flash */
110#define CONFIG_CMD_NAND
111#define CONFIG_NAND_ATMEL
112#define CONFIG_SYS_MAX_NAND_DEVICE 1
113#define CONFIG_SYS_NAND_BASE 0x40000000
114#define CONFIG_SYS_NAND_DBW_8 1
115/* our ALE is AD21 */
116#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
117/* our CLE is AD22 */
118#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
119#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
120#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
121
122/* NOR flash - no real flash on this board */
123#define CONFIG_SYS_NO_FLASH 1
124
125#define CONFIG_DOS_PARTITION 1
126#define CONFIG_CMD_FAT 1
127
128#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
129
130#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
131#define CONFIG_SYS_MEMTEST_END 0x23e00000
132
133/* Env in EEPROM, bootstrap + u-boot in NAND*/
134#ifdef CONFIG_ENV_IS_IN_EEPROM
135#define CONFIG_ENV_OFFSET 0x20
136#define CONFIG_ENV_SIZE 0x1000
137#endif
138
139/* Env, bootstrap and u-boot in NAND */
140#ifdef CONFIG_ENV_IS_IN_NAND
141#define CONFIG_ENV_OFFSET 0x60000
142#define CONFIG_ENV_OFFSET_REDUND 0x80000
143#define CONFIG_ENV_SIZE 0x20000
Albin Tonnerre2dc851e2009-08-20 16:04:49 +0200144#endif
145
146#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
147#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
148 "root=/dev/mtdblock1 " \
149 "mtdparts=atmel_nand:16M(kernel)ro," \
150 "120M(rootfs),-(other) " \
151 "rw rootfstype=jffs2"
152
153#define CONFIG_BAUDRATE 115200
154#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
155
156#define CONFIG_SYS_PROMPT "U-Boot> "
157#define CONFIG_SYS_CBSIZE 256
158#define CONFIG_SYS_MAXARGS 16
159#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
160#define CONFIG_SYS_LONGHELP 1
161#define CONFIG_CMDLINE_EDITING 1
162
163/*
164 * Size of malloc() pool
165 */
166#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
167#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
168
169#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
170
171#ifdef CONFIG_USE_IRQ
172#error CONFIG_USE_IRQ not supported
173#endif
174
175#endif