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Jens Scharsig77e72732010-02-03 22:48:09 +01001/*
2 * (C) Copyright 2008-2009
3 * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
4 * Jens Scharsig <esw@bus-elektronik.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26#include <exports.h>
27#include <net.h>
28#include <netdev.h>
29#include <nand.h>
30
31#include <asm/io.h>
32#include <asm/arch/hardware.h>
33#include <asm/arch/at91_pio.h>
34#include <asm/arch/at91_pmc.h>
35#include <asm/arch/at91_mc.h>
36
37#ifdef CONFIG_STATUS_LED
38#include <status_led.h>
39#endif
40
41#ifdef CONFIG_VIDEO
42#include <bus_vcxk.h>
43
44extern unsigned long display_width;
45extern unsigned long display_height;
46#endif
47
48#ifdef CONFIG_CMD_NAND
49void cpux9k2_nand_hw_init(void);
50#endif
51
52DECLARE_GLOBAL_DATA_PTR;
53
54/*
55 * Miscelaneous platform dependent initialisations
56 */
57
58int board_init(void)
59{
60 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
61 /* Enable Ctrlc */
62 console_init_f();
63
64 /* Correct IRDA resistor problem / Set PA23_TXD in Output */
65 writel(AT91_PMX_AA_TXD2, &pio->pioa.oer);
66
67 gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
68 /* adress of boot parameters */
Jens Scharsigcebcf7d2010-10-19 19:37:15 +020069 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
Jens Scharsig77e72732010-02-03 22:48:09 +010070
71#ifdef CONFIG_STATUS_LED
72 status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
73#endif
74#ifdef CONFIG_CMD_NAND
75 cpux9k2_nand_hw_init();
76#endif
77 return 0;
78}
79
80#ifdef CONFIG_MISC_INIT_R
81
82int misc_init_r(void)
83{
84 uchar mac[8];
85 uchar tm;
86 uchar midx;
87 uchar macn6, macn7;
88
89#ifdef CONFIG_NET_MULTI
90 if (getenv("ethaddr") == NULL) {
91 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
92 CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
93 (uchar *) &mac, sizeof(mac)) != 0) {
94 puts("Error reading MAC from EEPROM\n");
95 } else {
96 tm = 0;
97 macn6 = 0;
98 macn7 = 0xFF;
99 for (midx = 0; midx < 6; midx++) {
100 if ((mac[midx] != 0) && (mac[midx] != 0xFF))
101 tm++;
102 macn6 += mac[midx];
103 macn7 ^= mac[midx];
104 }
105 if ((macn6 != mac[6]) || (macn7 != mac[7]))
106 tm = 0;
107 if (tm)
108 eth_setenv_enetaddr("ethaddr", mac);
109 else
110 puts("Error: invalid MAC at EEPROM\n");
111 }
112 }
113#endif
114 gd->jt[XF_do_reset] = (void *) do_reset;
115
116#ifdef CONFIG_STATUS_LED
117 status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
118#endif
119 return 0;
120}
121#endif
122
123#ifdef CONFIG_RESET_PHY_R
124void reset_phy(void)
125{
126 udelay(10000);
127 eth_init(gd->bd);
128}
129#endif
130
131/*
132 * DRAM initialisations
133 */
134
135int dram_init(void)
136{
Jens Scharsigcebcf7d2010-10-19 19:37:15 +0200137 gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
138 CONFIG_SYS_SDRAM_SIZE);
Jens Scharsig77e72732010-02-03 22:48:09 +0100139 return 0;
140}
141
142/*
143 * Ethernet initialisations
144 */
145
146#ifdef CONFIG_DRIVER_AT91EMAC
147int board_eth_init(bd_t *bis)
148{
149 int rc = 0;
150 rc = at91emac_register(bis, (u32) AT91_EMAC_BASE);
151 return rc;
152}
153#endif
154
155/*
156 * Disk On Chip (NAND) Millenium initialization.
157 * The NAND lives in the CS2* space
158 */
159#if defined(CONFIG_CMD_NAND)
160
161#define MASK_ALE (1 << 22) /* our ALE is AD22 */
162#define MASK_CLE (1 << 21) /* our CLE is AD21 */
163
164void cpux9k2_nand_hw_init(void)
165{
166 unsigned long csr;
167 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
168 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
169 at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
170
171 /* Setup Smart Media, fitst enable the address range of CS3 */
172 writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
173
174 /* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
175 csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
176 AT91_SMC_CSR_NWS(3) |
177 AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
178 AT91_SMC_CSR_WSEN;
179 writel(csr, &mc->smc.csr[3]);
180
181 writel(AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE, &pio->pioc.asr);
182 writel(AT91_PMX_CA_BFCK | AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE,
183 &pio->pioc.pdr);
184
185 /* Configure PC2 as input (signal Nand READY ) */
186 writel(AT91_PMX_CA_BFAVD, &pio->pioc.per);
187 writel(AT91_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
188 writel(AT91_PMX_CA_BFCK, &pio->pioc.codr);
189
190 /* PIOC clock enabling */
191 writel(1 << AT91_ID_PIOC, &pmc->pcer);
192}
193
194static void board_nand_hwcontrol(struct mtd_info *mtd,
195 int cmd, unsigned int ctrl)
196{
197 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
198 struct nand_chip *this = mtd->priv;
199 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
200
201 if (ctrl & NAND_CTRL_CHANGE) {
202 IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
203
204 if (ctrl & NAND_CLE)
205 IO_ADDR_W |= MASK_CLE;
206 if (ctrl & NAND_ALE)
207 IO_ADDR_W |= MASK_ALE;
208
209 if ((ctrl & NAND_NCE))
210 writel(1, &pio->pioc.codr);
211 else
212 writel(1, &pio->pioc.sodr);
213
214 this->IO_ADDR_W = (void *) IO_ADDR_W;
215 }
216 if (cmd != NAND_CMD_NONE)
217 writeb(cmd, this->IO_ADDR_W);
218}
219
220static int board_nand_dev_ready(struct mtd_info *mtd)
221{
222 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
223 return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0);
224}
225
226int board_nand_init(struct nand_chip *nand)
227{
228 cpux9k2_nand_hw_init();
229 nand->ecc.mode = NAND_ECC_SOFT;
230 nand->cmd_ctrl = board_nand_hwcontrol;
231 nand->dev_ready = board_nand_dev_ready;
232 nand->chip_delay = 20;
233 return 0;
234}
235
236#endif
237
238#if defined(CONFIG_VIDEO)
239/*
240 * drv_video_init
241 * FUNCTION: initialize VCxK device
242 */
243
244int drv_video_init(void)
245{
246#ifdef CONFIG_SPLASH_SCREEN
247 unsigned long splash;
248#endif
249 char *s;
250 unsigned long csr;
251 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
252 at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
253
254 printf("Init Video as ");
255 s = getenv("displaywidth");
256 if (s != NULL)
257 display_width = simple_strtoul(s, NULL, 10);
258 else
259 display_width = 256;
260 s = getenv("displayheight");
261 if (s != NULL)
262 display_height = simple_strtoul(s, NULL, 10);
263 else
264 display_height = 256;
265 printf("%ld x %ld pixel matrix\n", display_width, display_height);
266
267 /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */
268 csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) |
269 AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) |
270 AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
271 AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
272 writel(csr, &mc->smc.csr[2]);
273 writel(1 << AT91_ID_PIOB, &pmc->pcer);
274
275 vcxk_init(display_width, display_height);
276#ifdef CONFIG_SPLASH_SCREEN
277 s = getenv("splashimage");
278 if (s != NULL) {
279 splash = simple_strtoul(s, NULL, 16);
280 printf("use splashimage: %lx\n", splash);
281 video_display_bitmap(splash, 0, 0);
282 }
283#endif
284 return 0;
285}
286#endif
287
288#ifdef CONFIG_SOFT_I2C
289
290void i2c_init_board(void)
291{
292 u32 pin;
293 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
294 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
295
296 writel(1 << AT91_ID_PIOA, &pmc->pcer);
297 pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
298 writel(pin, &pio->pioa.idr);
299 writel(pin, &pio->pioa.pudr);
300 writel(pin, &pio->pioa.per);
301 writel(pin, &pio->pioa.oer);
302 writel(pin, &pio->pioa.sodr);
303}
304
305#endif
306
307/*--------------------------------------------------------------------------*/
308
309#ifdef CONFIG_STATUS_LED
310
311void __led_toggle(led_id_t mask)
312{
313 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
314
315 if (readl(&pio->piod.odsr) & mask)
316 writel(mask, &pio->piod.codr);
317 else
318 writel(mask, &pio->piod.codr);
319}
320
321void __led_init(led_id_t mask, int state)
322{
323 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
324 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
325
326 writel(1 << AT91_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
327 /* Disable peripherals on LEDs */
328 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
329 /* Enable pins as outputs */
330 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
331 /* Turn all LEDs OFF */
332 writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
333
334 __led_set(mask, state);
335}
336
337void __led_set(led_id_t mask, int state)
338{
339 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
340 if (state == STATUS_LED_ON)
341 writel(mask, &pio->piod.codr);
342 else
343 writel(mask, &pio->piod.sodr);
344}
345
346#endif
347
348/*---------------------------------------------------------------------------*/
349
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200350int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Jens Scharsig77e72732010-02-03 22:48:09 +0100351{
352 int rcode = 0;
353 ulong side;
354 ulong bright;
355
356 switch (argc) {
357 case 3:
358 side = simple_strtoul(argv[1], NULL, 10);
359 bright = simple_strtoul(argv[2], NULL, 10);
360 if ((side >= 0) && (side <= 3) &&
361 (bright >= 0) && (bright <= 1000)) {
362 vcxk_setbrightness(side, bright);
363 rcode = 0;
364 } else {
365 printf("parameters out of range\n");
366 printf("Usage:\n%s\n", cmdtp->usage);
367 rcode = 1;
368 }
369 break;
370 default:
371 printf("Usage:\n%s\n", cmdtp->usage);
372 rcode = 1;
373 break;
374 }
375 return rcode;
376}
377
378/*---------------------------------------------------------------------------*/
379
380U_BOOT_CMD(
381 bright, 3, 0, do_brightness,
382 "bright - sets the display brightness\n",
383 " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
384);
385
386/* EOF cpu9k2.c */