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Stefan Roesec157d8e2005-08-01 16:41:48 +02001/*
2*
3* See file CREDITS for list of people who contributed to this
4* project.
5*
6* This program is free software; you can redistribute it and/or
7* modify it under the terms of the GNU General Public License as
8* published by the Free Software Foundation; either version 2 of
9* the License, or (at your option) any later version.
10*
11* This program is distributed in the hope that it will be useful,
12* but WITHOUT ANY WARRANTY; without even the implied warranty of
13* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14* GNU General Public License for more details.
15*
16* You should have received a copy of the GNU General Public License
17* along with this program; if not, write to the Free Software
18* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19* MA 02111-1307 USA
20*/
21
22#include <ppc_asm.tmpl>
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020023#include <asm/mmu.h>
Stefan Roesec157d8e2005-08-01 16:41:48 +020024#include <config.h>
25
Stefan Roesec157d8e2005-08-01 16:41:48 +020026/**************************************************************************
27 * TLB TABLE
28 *
29 * This table is used by the cpu boot code to setup the initial tlb
30 * entries. Rather than make broad assumptions in the cpu source tree,
31 * this table lets each board set things up however they like.
32 *
33 * Pointer to the table is returned in r1
34 *
35 *************************************************************************/
36
37 .section .bootpg,"ax"
38 .globl tlbtab
39
40tlbtab:
41 tlbtab_start
Stefan Roese84286382005-08-11 18:03:14 +020042
43 /*
44 * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
45 * speed up boot process. It is patched after relocation to enable SA_I
46 */
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020047 tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/)
Stefan Roese84286382005-08-11 18:03:14 +020048
49 /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020050 tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G )
Stefan Roese84286382005-08-11 18:03:14 +020051
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020052 tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG )
53 tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG )
54 tlbentry( CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_RWX | SA_W|SA_I )
Stefan Roesec157d8e2005-08-01 16:41:48 +020055
56 /* PCI */
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020057 tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG )
58 tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG )
59 tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG )
60 tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG )
Stefan Roesec157d8e2005-08-01 16:41:48 +020061
62 /* USB 2.0 Device */
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020063 tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG )
Stefan Roesec157d8e2005-08-01 16:41:48 +020064
65 tlbtab_end