blob: 2dffc02dcd8b5e84e4e116fde415a1a5c2d9d55b [file] [log] [blame]
Tom Rini762f85b2024-07-20 11:15:10 -06001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/nxp,imx95-blk-ctl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX95 Block Control
8
9maintainers:
10 - Peng Fan <peng.fan@nxp.com>
11
12properties:
13 compatible:
14 items:
15 - enum:
16 - nxp,imx95-lvds-csr
17 - nxp,imx95-display-csr
18 - nxp,imx95-camera-csr
19 - nxp,imx95-vpu-csr
20 - const: syscon
21
22 reg:
23 maxItems: 1
24
25 power-domains:
26 maxItems: 1
27
28 clocks:
29 maxItems: 1
30
31 '#clock-cells':
32 const: 1
33 description:
34 The clock consumer should specify the desired clock by having the clock
35 ID in its "clocks" phandle cell. See
36 include/dt-bindings/clock/nxp,imx95-clock.h
37
38required:
39 - compatible
40 - reg
41 - '#clock-cells'
42 - power-domains
43 - clocks
44
45additionalProperties: false
46
47examples:
48 - |
49 syscon@4c410000 {
50 compatible = "nxp,imx95-vpu-csr", "syscon";
51 reg = <0x4c410000 0x10000>;
52 #clock-cells = <1>;
53 clocks = <&scmi_clk 114>;
54 power-domains = <&scmi_devpd 21>;
55 };
56...