| Marek Vasut | 329267f | 2020-04-04 15:21:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Marek Vasut | 16b6e4a | 2018-01-07 20:17:23 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016 Glider bvba |
| Marek Vasut | 16b6e4a | 2018-01-07 20:17:23 +0100 | [diff] [blame] | 4 | */ |
| 5 | #ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__ |
| 6 | #define __DT_BINDINGS_POWER_R8A7790_SYSC_H__ |
| 7 | |
| 8 | /* |
| 9 | * These power domain indices match the numbers of the interrupt bits |
| 10 | * representing the power areas in the various Interrupt Registers |
| 11 | * (e.g. SYSCISR, Interrupt Status Register) |
| 12 | */ |
| 13 | |
| 14 | #define R8A7790_PD_CA15_CPU0 0 |
| 15 | #define R8A7790_PD_CA15_CPU1 1 |
| 16 | #define R8A7790_PD_CA15_CPU2 2 |
| 17 | #define R8A7790_PD_CA15_CPU3 3 |
| 18 | #define R8A7790_PD_CA7_CPU0 5 |
| 19 | #define R8A7790_PD_CA7_CPU1 6 |
| 20 | #define R8A7790_PD_CA7_CPU2 7 |
| 21 | #define R8A7790_PD_CA7_CPU3 8 |
| 22 | #define R8A7790_PD_CA15_SCU 12 |
| 23 | #define R8A7790_PD_SH_4A 16 |
| 24 | #define R8A7790_PD_RGX 20 |
| 25 | #define R8A7790_PD_CA7_SCU 21 |
| 26 | #define R8A7790_PD_IMP 24 |
| 27 | |
| 28 | /* Always-on power area */ |
| 29 | #define R8A7790_PD_ALWAYS_ON 32 |
| 30 | |
| 31 | #endif /* __DT_BINDINGS_POWER_R8A7790_SYSC_H__ */ |