Simon Glass | 1fb115e | 2021-09-19 15:49:35 -0600 | [diff] [blame] | 1 | .. SPDX-License-Identifier: GPL-2.0+: |
| 2 | |
| 3 | sf command |
| 4 | ========== |
| 5 | |
| 6 | Synopis |
| 7 | ------- |
| 8 | |
| 9 | :: |
| 10 | |
| 11 | sf probe [[[<bus>:]<cs>] [<hz> [<mode>]]] |
| 12 | sf read <addr> <offset>|<partition> <len> |
| 13 | sf write <addr> <offset>|<partition> <len> |
| 14 | sf erase <offset>|<partition> <len> |
| 15 | sf update <addr> <offset>|<partition> <len> |
| 16 | sf protect lock|unlock <sector> <len> |
| 17 | sf test <offset>|<partition> <len> |
| 18 | |
| 19 | Description |
| 20 | ----------- |
| 21 | |
| 22 | The *sf* command is used to access SPI flash, supporting read/write/erase and |
| 23 | a few other functions. |
| 24 | |
| 25 | Probe |
| 26 | ----- |
| 27 | |
| 28 | The flash must first be probed with *sf probe* before any of the other |
| 29 | subcommands can be used. All of the parameters are optional: |
| 30 | |
| 31 | bus |
| 32 | SPI bus number containing the SPI-flash chip, e.g. 0. If you don't know |
| 33 | the number, you can use 'dm uclass' to see all the spi devices, |
| 34 | and check the value for 'seq' for each one (here 0 and 2):: |
| 35 | |
| 36 | uclass 89: spi |
| 37 | 0 spi@0 @ 05484960, seq 0 |
| 38 | 1 spi@1 @ 05484b40, seq 2 |
| 39 | |
| 40 | cs |
| 41 | SPI chip-select to use for the chip. This is often 0 and can be omitted, |
| 42 | but in some cases multiple slaves are attached to a SPI controller, |
| 43 | selected by a chip-select line for each one. |
| 44 | |
| 45 | hz |
| 46 | Speed of the SPI bus in hertz. This normally defaults to 100000, i.e. |
| 47 | 100KHz, which is very slow. Note that if the device exists in the |
| 48 | device tree, there might be a speed provided there, in which case this |
| 49 | setting is ignored. |
| 50 | |
| 51 | mode |
| 52 | SPI mode to use: |
| 53 | |
| 54 | ===== ================ |
| 55 | Mode Meaning |
| 56 | ===== ================ |
| 57 | 0 CPOL=0, CPHA=0 |
| 58 | 1 CPOL=0, CPHA=1 |
| 59 | 2 CPOL=1, CPHA=0 |
| 60 | 3 CPOL=1, CPHA=1 |
| 61 | ===== ================ |
| 62 | |
| 63 | Clock phase (CPHA) 0 means that data is transferred (sampled) on the |
| 64 | first clock edge; 1 means the second. |
| 65 | |
| 66 | Clock polarity (CPOL) controls the idle state of the clock, 0 for low, |
| 67 | 1 for high. |
| 68 | The active state is the opposite of idle. |
| 69 | |
| 70 | You may find this `SPI documentation`_ useful. |
| 71 | |
| 72 | Parameters for other subcommands (described below) are as follows: |
| 73 | |
| 74 | addr |
| 75 | Memory address to start transfer |
| 76 | |
| 77 | offset |
| 78 | Flash offset to start transfer |
| 79 | |
| 80 | partition |
| 81 | If the parameter is not numeric, it is assumed to be a partition |
| 82 | description in the format <dev_type><dev_num>,<part_num> which is not |
| 83 | covered here. This requires CONFIG_CMD_MTDPARTS. |
| 84 | |
| 85 | len |
| 86 | Number of bytes to transfer |
| 87 | |
| 88 | Read |
| 89 | ~~~~ |
| 90 | |
| 91 | Use *sf read* to read from SPI flash to memory. The read will fail if an |
| 92 | attempt is made to read past the end of the flash. |
| 93 | |
| 94 | |
| 95 | Write |
| 96 | ~~~~~ |
| 97 | |
| 98 | Use *sf write* to write from memory to SPI flash. The SPI flash should be |
| 99 | erased first, since otherwise the result is undefined. |
| 100 | |
| 101 | The write will fail if an attempt is made to read past the end of the flash. |
| 102 | |
| 103 | |
| 104 | Erase |
| 105 | ~~~~~ |
| 106 | |
| 107 | Use *sf erase* to erase a region of SPI flash. The erase will fail if any part |
| 108 | of the region to be erased is protected or lies past the end of the flash. It |
| 109 | may also fail if the start offset or length are not aligned to an erase region |
| 110 | (e.g. 256 bytes). |
| 111 | |
| 112 | |
| 113 | Update |
| 114 | ~~~~~~ |
| 115 | |
| 116 | Use *sf update* to automatically erase and update a region of SPI flash from |
| 117 | memory. This works a sector at a time (typical 4KB or 64KB). For each |
| 118 | sector it first checks if the sector already has the right data. If so it is |
| 119 | skipped. If not, the sector is erased and the new data written. Note that if |
| 120 | the length is not a multiple of the erase size, the space after the data in |
| 121 | the last sector will be erased. If the offset does not start at the beginning |
| 122 | of an erase block, the operation will fail. |
| 123 | |
| 124 | Speed statistics are shown including the number of bytes that were already |
| 125 | correct. |
| 126 | |
| 127 | |
| 128 | Protect |
| 129 | ~~~~~~~ |
| 130 | |
| 131 | SPI-flash chips often have a protection feature where the chip is split up into |
| 132 | regions which can be locked or unlocked. With *sf protect* it is possible to |
| 133 | change these settings, if supported by the driver. |
| 134 | |
| 135 | lock|unlock |
| 136 | Selects whether to lock or unlock the sectors |
| 137 | |
| 138 | <sector> |
| 139 | Start sector number to lock/unlock. This may be the byte offset or some |
| 140 | other value, depending on the chip. |
| 141 | |
| 142 | <len> |
| 143 | Number of bytes to lock/unlock |
| 144 | |
| 145 | |
| 146 | Test |
| 147 | ~~~~ |
| 148 | |
| 149 | A convenient and fast *sf test* subcommand provides a way to check that SPI |
| 150 | flash is working as expected. This works in four stages: |
| 151 | |
| 152 | * erase - erases the entire region |
| 153 | * check - checks that the region is erased |
| 154 | * write - writes a test pattern to the region, consisting of the U-Boot code |
| 155 | * read - reads back the test pattern to check that it was written correctly |
| 156 | |
| 157 | Memory is allocated for two buffers, each <len> bytes in size. At typical |
| 158 | size is 64KB to 1MB. The offset and size must be aligned to an erase boundary. |
| 159 | |
| 160 | Note that this test will fail if any part of the SPI flash is write-protected. |
| 161 | |
| 162 | |
| 163 | Examples |
| 164 | -------- |
| 165 | |
| 166 | This first example uses sandbox:: |
| 167 | |
| 168 | => sf probe |
| 169 | SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB |
| 170 | => sf read 1000 1100 80000 |
| 171 | device 0 offset 0x1100, size 0x80000 |
| 172 | SF: 524288 bytes @ 0x1100 Read: OK |
| 173 | => md 1000 |
| 174 | 00001000: edfe0dd0 f33a0000 78000000 84250000 ......:....x..%. |
| 175 | 00001010: 28000000 11000000 10000000 00000000 ...(............ |
| 176 | 00001020: 6f050000 0c250000 00000000 00000000 ...o..%......... |
| 177 | 00001030: 00000000 00000000 00000000 00000000 ................ |
| 178 | 00001040: 00000000 00000000 00000000 00000000 ................ |
| 179 | 00001050: 00000000 00000000 00000000 00000000 ................ |
| 180 | 00001060: 00000000 00000000 00000000 00000000 ................ |
| 181 | 00001070: 00000000 00000000 01000000 00000000 ................ |
| 182 | 00001080: 03000000 04000000 00000000 01000000 ................ |
| 183 | 00001090: 03000000 04000000 0f000000 01000000 ................ |
| 184 | 000010a0: 03000000 08000000 1b000000 646e6173 ............sand |
| 185 | 000010b0: 00786f62 03000000 08000000 21000000 box............! |
| 186 | 000010c0: 646e6173 00786f62 01000000 61696c61 sandbox.....alia |
| 187 | 000010d0: 00736573 03000000 07000000 2c000000 ses............, |
| 188 | 000010e0: 6332692f 00003040 03000000 07000000 /i2c@0.......... |
| 189 | 000010f0: 31000000 6963702f 00003040 03000000 ...1/pci@0...... |
| 190 | => sf erase 0 80000 |
| 191 | SF: 524288 bytes @ 0x0 Erased: OK |
| 192 | => sf read 1000 1100 80000 |
| 193 | device 0 offset 0x1100, size 0x80000 |
| 194 | SF: 524288 bytes @ 0x1100 Read: OK |
| 195 | => md 1000 |
| 196 | 00001000: ffffffff ffffffff ffffffff ffffffff ................ |
| 197 | 00001010: ffffffff ffffffff ffffffff ffffffff ................ |
| 198 | 00001020: ffffffff ffffffff ffffffff ffffffff ................ |
| 199 | 00001030: ffffffff ffffffff ffffffff ffffffff ................ |
| 200 | 00001040: ffffffff ffffffff ffffffff ffffffff ................ |
| 201 | 00001050: ffffffff ffffffff ffffffff ffffffff ................ |
| 202 | 00001060: ffffffff ffffffff ffffffff ffffffff ................ |
| 203 | 00001070: ffffffff ffffffff ffffffff ffffffff ................ |
| 204 | 00001080: ffffffff ffffffff ffffffff ffffffff ................ |
| 205 | 00001090: ffffffff ffffffff ffffffff ffffffff ................ |
| 206 | 000010a0: ffffffff ffffffff ffffffff ffffffff ................ |
| 207 | 000010b0: ffffffff ffffffff ffffffff ffffffff ................ |
| 208 | 000010c0: ffffffff ffffffff ffffffff ffffffff ................ |
| 209 | 000010d0: ffffffff ffffffff ffffffff ffffffff ................ |
| 210 | 000010e0: ffffffff ffffffff ffffffff ffffffff ................ |
| 211 | 000010f0: ffffffff ffffffff ffffffff ffffffff ................ |
| 212 | |
| 213 | This second example is running on coral, an x86 Chromebook:: |
| 214 | |
| 215 | => sf probe |
| 216 | SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB |
| 217 | => sf erase 300000 80000 |
| 218 | SF: 524288 bytes @ 0x300000 Erased: OK |
| 219 | => sf update 1110000 300000 80000 |
| 220 | device 0 offset 0x300000, size 0x80000 |
| 221 | 524288 bytes written, 0 bytes skipped in 0.457s, speed 1164578 B/s |
| 222 | |
| 223 | # This does nothing as the flash is already updated |
| 224 | => sf update 1110000 300000 80000 |
| 225 | device 0 offset 0x300000, size 0x80000 |
| 226 | 0 bytes written, 524288 bytes skipped in 0.196s, speed 2684354 B/s |
| 227 | => sf test 00000 80000 # try a protected region |
| 228 | SPI flash test: |
| 229 | Erase failed (err = -5) |
| 230 | Test failed |
| 231 | => sf test 800000 80000 |
| 232 | SPI flash test: |
| 233 | 0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps |
| 234 | 1 check: 192 ticks, 2666 KiB/s 21.328 Mbps |
| 235 | 2 write: 227 ticks, 2255 KiB/s 18.040 Mbps |
| 236 | 3 read: 189 ticks, 2708 KiB/s 21.664 Mbps |
| 237 | Test passed |
| 238 | 0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps |
| 239 | 1 check: 192 ticks, 2666 KiB/s 21.328 Mbps |
| 240 | 2 write: 227 ticks, 2255 KiB/s 18.040 Mbps |
| 241 | 3 read: 189 ticks, 2708 KiB/s 21.664 Mbps |
| 242 | |
| 243 | |
| 244 | .. _SPI documentation: |
| 245 | https://en.wikipedia.org/wiki/Serial_Peripheral_Interface |