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Lucile Quirion9ee16892015-06-30 17:17:47 -04001/*
2 * Copyright (C) 2015, Savoir-faire Linux Inc.
3 *
4 * Derived from MX51EVK code by
5 * Guennadi Liakhovetski <lg@denx.de>
6 * Freescale Semiconductor, Inc.
7 *
8 * Configuration settings for the TS4800 Board
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16/* High Level Configuration Options */
17#define CONFIG_MX51
18
19#define CONFIG_DISPLAY_CPUINFO
20#define CONFIG_DISPLAY_BOARDINFO
21
22#define CONFIG_SYS_NO_FLASH /* No NOR Flash */
23#define CONFIG_SKIP_LOWLEVEL_INIT /* U-boot is a 2nd stage bootloader */
24
25#define CONFIG_HW_WATCHDOG
26
27#define CONFIG_MACH_TYPE MACH_TYPE_TS48XX
28
29/* text base address used when linking */
30#define CONFIG_SYS_TEXT_BASE 0x90008000
31
32#include <asm/arch/imx-regs.h>
33
34/* enable passing of ATAGs */
35#define CONFIG_CMDLINE_TAG
36#define CONFIG_SETUP_MEMORY_TAGS
37#define CONFIG_INITRD_TAG
38#define CONFIG_REVISION_TAG
39
Lucile Quirion9ee16892015-06-30 17:17:47 -040040/*
41 * Size of malloc() pool
42 */
43#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
44
45/*
46 * Hardware drivers
47 */
48
49#define CONFIG_MXC_UART
50#define CONFIG_MXC_UART_BASE UART1_BASE
51#define CONFIG_MXC_GPIO
52
53/*
54 * SPI Configs
55 * */
56#define CONFIG_HARD_SPI /* puts SPI: ready */
57#define CONFIG_MXC_SPI /* driver for the SPI controllers*/
58#define CONFIG_CMD_SPI /* SPI serial bus support */
59
60/*
61 * MMC Configs
62 * */
63#define CONFIG_FSL_ESDHC
64#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
65
66#define CONFIG_MMC
67
68#define CONFIG_CMD_MMC
69#define CONFIG_GENERIC_MMC
70#define CONFIG_CMD_FAT
71#define CONFIG_DOS_PARTITION
72
Damien Riegelf3488bb2015-06-30 17:17:48 -040073/*
74 * Eth Configs
75 */
76#define CONFIG_MII
77#define CONFIG_PHYLIB
78#define CONFIG_PHY_SMSC
79
80#define CONFIG_FEC_MXC
81#define IMX_FEC_BASE FEC_BASE_ADDR
82#define CONFIG_ETHPRIME "FEC"
83#define CONFIG_FEC_MXC_PHYADDR 0
84
85#define CONFIG_CMD_PING
86#define CONFIG_CMD_DHCP
87#define CONFIG_CMD_MII
88
Lucile Quirion9ee16892015-06-30 17:17:47 -040089/* allow to overwrite serial and ethaddr */
90#define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */
91#define CONFIG_CONS_INDEX 1 /* use UART0 : used by serial driver */
92#define CONFIG_BAUDRATE 115200
93
94/***********************************************************
95 * Command definition
96 ***********************************************************/
97
98#define CONFIG_CMD_BOOTZ
99#undef CONFIG_CMD_IMLS
100
101/* Environment variables */
102
103#define CONFIG_BOOTDELAY 1
104
105#define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */
106
107#define CONFIG_EXTRA_ENV_SETTINGS \
108 "script=boot.scr\0" \
109 "image=uImage\0" \
110 "mmcdev=0\0" \
111 "mmcpart=1\0" \
112 "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \
113 "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
114 "loadbootscript=" \
115 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
116 "bootscript=echo Running bootscript from mmc ...; " \
117 "source\0" \
118 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
119 "mmcboot=echo Booting from mmc ...; " \
120 "run mmcargs addtty; " \
121 "bootm; "
122
123#define CONFIG_BOOTCOMMAND \
124 "mmc dev ${mmcdev}; if mmc rescan; then " \
125 "if run loadbootscript; then " \
126 "run bootscript; " \
127 "else " \
128 "if run loadimage; then " \
129 "run mmcboot; " \
130 "fi; " \
131 "fi; " \
132 "fi; "
133
134/*
135 * Miscellaneous configurable options
136 */
137#define CONFIG_SYS_LONGHELP /* undef to save memory */
138#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
139#define CONFIG_AUTO_COMPLETE
140#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
141/* Print Buffer Size */
142#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
143#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
144#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
145
146#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
147
148#define CONFIG_CMDLINE_EDITING
149
150/*-----------------------------------------------------------------------
151 * Physical Memory Map
152 */
153#define CONFIG_NR_DRAM_BANKS 1
154#define PHYS_SDRAM_1 CSD0_BASE_ADDR
155#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
156
157#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
158#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
159#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
160
161#define CONFIG_BOARD_EARLY_INIT_F
162
163#define CONFIG_SYS_INIT_SP_OFFSET \
164 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
165#define CONFIG_SYS_INIT_SP_ADDR \
166 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
167
168/* Low level init */
169#define CONFIG_SYS_DDR_CLKSEL 0
170#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
171#define CONFIG_SYS_MAIN_PWR_ON
172
173/*-----------------------------------------------------------------------
174 * Environment organization
175 */
176
177#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
178#define CONFIG_ENV_SIZE (8 * 1024)
179#define CONFIG_ENV_IS_IN_MMC
180#define CONFIG_SYS_MMC_ENV_DEV 0
181
182#endif