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Hao Zhang2221cd12014-07-09 23:44:48 +03001/*
2 * Common configuration header file for all Keystone II EVM platforms
3 *
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_KS2_EVM_H
11#define __CONFIG_KS2_EVM_H
12
13#define CONFIG_SOC_KEYSTONE
14
15/* U-Boot Build Configuration */
16#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
17#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
18#define CONFIG_SYS_CONSOLE_INFO_QUIET
19#define CONFIG_BOARD_EARLY_INIT_F
20#define CONFIG_SYS_THUMB_BUILD
21
22/* SoC Configuration */
Hao Zhang2221cd12014-07-09 23:44:48 +030023#define CONFIG_ARCH_CPU_INIT
24#define CONFIG_SYS_ARCH_TIMER
Hao Zhang2221cd12014-07-09 23:44:48 +030025#define CONFIG_SYS_TEXT_BASE 0x0c001000
26#define CONFIG_SPL_TARGET "u-boot-spi.gph"
27#define CONFIG_SYS_DCACHE_OFF
28
29/* Memory Configuration */
30#define CONFIG_NR_DRAM_BANKS 2
31#define CONFIG_SYS_SDRAM_BASE 0x80000000
32#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
33#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
34#define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
35#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */
36#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
37 GENERATED_GBL_DATA_SIZE)
38
39/* SPL SPI Loader Configuration */
40#define CONFIG_SPL_PAD_TO 65536
41#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
42#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
43 CONFIG_SPL_MAX_SIZE)
44#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
45#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
46 CONFIG_SPL_BSS_MAX_SIZE)
47#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
48#define CONFIG_SPL_STACK_SIZE (8 * 1024)
49#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
50 CONFIG_SYS_SPL_MALLOC_SIZE + \
51 CONFIG_SPL_STACK_SIZE - 4)
52#define CONFIG_SPL_LIBCOMMON_SUPPORT
53#define CONFIG_SPL_LIBGENERIC_SUPPORT
54#define CONFIG_SPL_SERIAL_SUPPORT
55#define CONFIG_SPL_SPI_FLASH_SUPPORT
56#define CONFIG_SPL_SPI_SUPPORT
57#define CONFIG_SPL_BOARD_INIT
58#define CONFIG_SPL_SPI_LOAD
Hao Zhang2221cd12014-07-09 23:44:48 +030059#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
60#define CONFIG_SPL_FRAMEWORK
61
62/* UART Configuration */
63#define CONFIG_SYS_NS16550
64#define CONFIG_SYS_NS16550_SERIAL
65#define CONFIG_SYS_NS16550_MEM32
66#define CONFIG_SYS_NS16550_REG_SIZE -4
67#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
68#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
69#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
70#define CONFIG_CONS_INDEX 1
71#define CONFIG_BAUDRATE 115200
72
73/* SPI Configuration */
74#define CONFIG_SPI
Hao Zhang2221cd12014-07-09 23:44:48 +030075#define CONFIG_SPI_FLASH_STMICRO
76#define CONFIG_DAVINCI_SPI
77#define CONFIG_CMD_SPI
Hao Zhang4dca7f02014-07-16 00:59:23 +030078#define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6)
Hao Zhang2221cd12014-07-09 23:44:48 +030079#define CONFIG_SF_DEFAULT_SPEED 30000000
80#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
81#define CONFIG_SYS_SPI0
82#define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE
83#define CONFIG_SYS_SPI0_NUM_CS 4
84#define CONFIG_SYS_SPI1
85#define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
86#define CONFIG_SYS_SPI1_NUM_CS 4
87#define CONFIG_SYS_SPI2
88#define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
89#define CONFIG_SYS_SPI2_NUM_CS 4
90
91/* Network Configuration */
Khoronzhuk, Ivan3fe93622014-10-17 20:44:35 +030092#define CONFIG_PHYLIB
93#define CONFIG_PHY_MARVELL
Hao Zhang2221cd12014-07-09 23:44:48 +030094#define CONFIG_MII
95#define CONFIG_BOOTP_DEFAULT
96#define CONFIG_BOOTP_DNS
97#define CONFIG_BOOTP_DNS2
98#define CONFIG_BOOTP_SEND_HOSTNAME
99#define CONFIG_NET_RETRY_COUNT 32
Hao Zhang2221cd12014-07-09 23:44:48 +0300100#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
101#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
102#define CONFIG_SYS_SGMII_RATESCALE 2
103
Khoronzhuk, Ivanef454712014-09-05 19:02:47 +0300104/* Keyston Navigator Configuration */
Hao Zhang796bcee2014-10-29 13:09:34 +0200105#define CONFIG_TI_KSNAV
Khoronzhuk, Ivanef454712014-09-05 19:02:47 +0300106#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
107#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
108#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
109#define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
110#define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
111#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
112#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
113#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
114#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
115#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
116#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
117#define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
118#define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
119#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
120
121/* NETCP pktdma */
Hao Zhang796bcee2014-10-29 13:09:34 +0200122#define CONFIG_KSNAV_PKTDMA_NETCP
Khoronzhuk, Ivanef454712014-09-05 19:02:47 +0300123#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
124#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
125#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
126#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
127#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
128#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
129#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
130#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
131#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
132#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
133#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
134
Khoronzhuk, Ivan0935cac2014-09-29 22:17:22 +0300135/* Keystone net */
Hao Zhang796bcee2014-10-29 13:09:34 +0200136#define CONFIG_DRIVER_TI_KEYSTONE_NET
Hao Zhang92a16c82014-10-22 17:18:23 +0300137#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
138#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
139#define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE
Khoronzhuk, Ivan3c615022014-10-17 21:01:13 +0300140#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
Hao Zhang92a16c82014-10-22 17:18:23 +0300141#define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
Khoronzhuk, Ivan0935cac2014-09-29 22:17:22 +0300142
Khoronzhuk, Ivan87ac27b2014-10-29 13:09:32 +0200143/* SerDes */
144#define CONFIG_TI_KEYSTONE_SERDES
145
Hao Zhang2221cd12014-07-09 23:44:48 +0300146/* AEMIF */
147#define CONFIG_TI_AEMIF
148#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
149
150/* I2C Configuration */
151#define CONFIG_SYS_I2C
152#define CONFIG_SYS_I2C_DAVINCI
153#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
154#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
155#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
156#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
157#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
158#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
159#define I2C_BUS_MAX 3
160
161/* EEPROM definitions */
162#define CONFIG_SYS_I2C_MULTI_EEPROMS
163#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
164#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
165#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
166#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
167#define CONFIG_ENV_EEPROM_IS_ON_I2C
168
169/* NAND Configuration */
170#define CONFIG_NAND_DAVINCI
171#define CONFIG_KEYSTONE_RBL_NAND
172#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
173#define CONFIG_SYS_NAND_MASK_CLE 0x4000
174#define CONFIG_SYS_NAND_MASK_ALE 0x2000
175#define CONFIG_SYS_NAND_CS 2
176#define CONFIG_SYS_NAND_USE_FLASH_BBT
177#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
178
179#define CONFIG_SYS_NAND_LARGEPAGE
180#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
181#define CONFIG_SYS_MAX_NAND_DEVICE 1
182#define CONFIG_SYS_NAND_MAX_CHIPS 1
183#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
184#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
185#define CONFIG_ENV_IS_IN_NAND
186#define CONFIG_ENV_OFFSET 0x100000
187#define CONFIG_MTD_PARTITIONS
188#define CONFIG_MTD_DEVICE
189#define CONFIG_RBTREE
190#define CONFIG_LZO
191#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
192#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
193 "1024k(bootloader)ro,512k(params)ro," \
194 "-(ubifs)"
195
WingMan Kwokbc0e8d72014-09-05 22:26:23 +0300196/* USB Configuration */
197#define CONFIG_USB_XHCI
Ramneek Mehresh792651f2015-05-29 14:47:18 +0530198#define CONFIG_USB_XHCI_DWC3
WingMan Kwokbc0e8d72014-09-05 22:26:23 +0300199#define CONFIG_USB_XHCI_KEYSTONE
200#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
201#define CONFIG_USB_STORAGE
202#define CONFIG_DOS_PARTITION
203#define CONFIG_EFI_PARTITION
204#define CONFIG_FS_FAT
205#define CONFIG_SYS_CACHELINE_SIZE 64
206#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
207#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
208#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
209#define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
210
Hao Zhang2221cd12014-07-09 23:44:48 +0300211/* U-Boot command configuration */
Hao Zhang2221cd12014-07-09 23:44:48 +0300212#define CONFIG_CMD_ASKENV
213#define CONFIG_CMD_DHCP
214#define CONFIG_CMD_I2C
215#define CONFIG_CMD_PING
216#define CONFIG_CMD_SAVES
217#define CONFIG_CMD_MTDPARTS
218#define CONFIG_CMD_NAND
219#define CONFIG_CMD_UBI
220#define CONFIG_CMD_UBIFS
221#define CONFIG_CMD_SF
222#define CONFIG_CMD_EEPROM
WingMan Kwokbc0e8d72014-09-05 22:26:23 +0300223#define CONFIG_CMD_USB
Khoronzhuk, Ivan15bbafa2014-11-04 18:06:27 +0200224#define CONFIG_CMD_FAT
225#define CONFIG_CMD_FS_GENERIC
Hao Zhang2221cd12014-07-09 23:44:48 +0300226
227/* U-Boot general configuration */
228#define CONFIG_SYS_GENERIC_BOARD
Khoronzhuk, Ivan83472102014-09-26 15:42:30 +0300229#define CONFIG_MISC_INIT_R
Hao Zhang2221cd12014-07-09 23:44:48 +0300230#define CONFIG_SYS_CBSIZE 1024
231#define CONFIG_SYS_PBSIZE 2048
232#define CONFIG_SYS_MAXARGS 16
233#define CONFIG_SYS_HUSH_PARSER
234#define CONFIG_SYS_LONGHELP
235#define CONFIG_CRC32_VERIFY
236#define CONFIG_MX_CYCLIC
237#define CONFIG_CMDLINE_EDITING
238#define CONFIG_VERSION_VARIABLE
239#define CONFIG_TIMESTAMP
240
241/* EDMA3 */
242#define CONFIG_TI_EDMA3
243
244#define CONFIG_BOOTDELAY 3
245#define CONFIG_BOOTFILE "uImage"
246#define CONFIG_EXTRA_ENV_SETTINGS \
Murali Karicheri349c26d2014-11-04 16:52:34 +0200247 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
Murali Karicherib7d9f9c2014-11-03 18:09:52 +0200248 "boot=ubi\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300249 "tftp_root=/\0" \
250 "nfs_root=/export\0" \
251 "mem_lpae=1\0" \
252 "mem_reserve=512M\0" \
253 "addr_fdt=0x87000000\0" \
254 "addr_kern=0x88000000\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300255 "addr_uboot=0x87000000\0" \
256 "addr_fs=0x82000000\0" \
257 "addr_ubi=0x82000000\0" \
258 "addr_secdb_key=0xc000000\0" \
259 "fdt_high=0xffffffff\0" \
Khoronzhuk, Ivandd310792014-11-04 16:52:35 +0200260 "name_kern=uImage-keystone-evm.bin\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300261 "run_mon=mon_install ${addr_mon}\0" \
262 "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \
263 "init_net=run args_all args_net\0" \
264 "init_ubi=run args_all args_ubi; " \
Khoronzhuk, Ivanff52e3b2014-11-03 18:09:51 +0200265 "ubi part ubifs; ubifsmount ubi:boot;" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300266 "ubifsload ${addr_secdb_key} securedb.key.bin;\0" \
267 "get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
268 "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \
269 "get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
270 "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \
271 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
272 "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
273 "get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \
274 "burn_uboot_spi=sf probe; sf erase 0 0x100000; " \
275 "sf write ${addr_uboot} 0 ${filesize}\0" \
276 "burn_uboot_nand=nand erase 0 0x100000; " \
277 "nand write ${addr_uboot} 0 ${filesize}\0" \
278 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300279 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
280 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
281 "${nfs_options} ip=dhcp\0" \
282 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
283 "get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
284 "get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
285 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
286 "get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0" \
287 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
288 "burn_ubi=nand erase.part ubifs; " \
289 "nand write ${addr_ubi} ubifs ${filesize}\0" \
290 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
291 "args_ramfs=setenv bootargs ${bootargs} " \
292 "rdinit=/sbin/init rw root=/dev/ram0 " \
293 "initrd=0x802000000,9M\0" \
294 "no_post=1\0" \
295 "mtdparts=mtdparts=davinci_nand.0:" \
296 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
297
298#define CONFIG_BOOTCOMMAND \
299 "run init_${boot} get_fdt_${boot} get_mon_${boot} " \
300 "get_kern_${boot} run_mon run_kern"
301
302#define CONFIG_BOOTARGS \
303
304/* Linux interfacing */
305#define CONFIG_CMDLINE_TAG
306#define CONFIG_SETUP_MEMORY_TAGS
307#define CONFIG_OF_LIBFDT 1
308#define CONFIG_OF_BOARD_SETUP
309#define CONFIG_SYS_BARGSIZE 1024
310#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
311#define CONFIG_LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
312
313#define CONFIG_SUPPORT_RAW_INITRD
314
315/* we may include files below only after all above definitions */
316#include <asm/arch/hardware.h>
317#include <asm/arch/clock.h>
318#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
319
Hao Zhang2221cd12014-07-09 23:44:48 +0300320#endif /* __CONFIG_KS2_EVM_H */