blob: ee7219f7ec5595eddc9e56140c18e455a1c182f4 [file] [log] [blame]
Michael Schwingen10c97872011-05-23 00:00:09 +02001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
25OUTPUT_ARCH (arm)
26ENTRY (_start)
27SECTIONS
28{
29 . = 0x00000000;
30
31 . = ALIGN (4);
32 .text : {
Albert ARIBAUDd026dec2013-06-11 14:17:33 +020033 *(.__image_copy_start)
Michael Schwingen10c97872011-05-23 00:00:09 +020034 arch/arm/cpu/ixp/start.o(.text*)
35 net/libnet.o(.text*)
36 board/dvlhost/libdvlhost.o(.text*)
37 arch/arm/cpu/ixp/libixp.o(.text*)
38 drivers/serial/libserial.o(.text*)
39
40 . = env_offset;
41 common/env_embedded.o(.ppcenv)
42 *(.text*)
43 }
44
45 . = ALIGN (4);
46 .rodata : {
47 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
48 }
49 . = ALIGN (4);
50 .data : {
51 *(.data*)
52 }
53 . = ALIGN (4);
54 .got : {
55 *(.got)
56 }
57 . =.;
Michael Schwingen10c97872011-05-23 00:00:09 +020058
Marek Vasut55675142012-10-12 10:27:03 +000059 . = ALIGN(4);
60 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +000061 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +000062 }
63
Michael Schwingen10c97872011-05-23 00:00:09 +020064 . = ALIGN (4);
Benoît Thébaudeau7086e912013-04-11 09:35:46 +000065
Albert ARIBAUDd026dec2013-06-11 14:17:33 +020066 .image_copy_end :
67 {
68 *(.__image_copy_end)
69 }
Benoît Thébaudeau7086e912013-04-11 09:35:46 +000070
Michael Schwingen10c97872011-05-23 00:00:09 +020071 .rel.dyn : {
72 __rel_dyn_start = .;
73 *(.rel*)
74 __rel_dyn_end = .;
75 }
76
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000077 _end = .;
78
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000079/*
80 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
81 * __bss_base and __bss_limit are for linker only (overlay ordering)
82 */
83
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000084 .bss_start __rel_dyn_start (OVERLAY) : {
85 KEEP(*(.__bss_start));
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000086 __bss_base = .;
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000087 }
88
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000089 .bss __bss_base (OVERLAY) : {
Michael Schwingen10c97872011-05-23 00:00:09 +020090 *(.bss*)
91 . = ALIGN(4);
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000092 __bss_limit = .;
Michael Schwingen10c97872011-05-23 00:00:09 +020093 }
Albert ARIBAUDf84a7b82013-04-11 05:43:21 +000094 .bss_end __bss_limit (OVERLAY) : {
95 KEEP(*(.__bss_end));
Albert ARIBAUD3ebd1cb2013-02-25 00:58:59 +000096 }
97
Albert ARIBAUD09d81182013-06-11 14:17:31 +020098 /DISCARD/ : { *(.dynsym) }
Michael Schwingen10c97872011-05-23 00:00:09 +020099 /DISCARD/ : { *(.dynstr*) }
100 /DISCARD/ : { *(.dynamic*) }
101 /DISCARD/ : { *(.plt*) }
102 /DISCARD/ : { *(.interp*) }
103 /DISCARD/ : { *(.gnu*) }
104}