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Larry Johnsonc591dff2007-12-27 11:28:51 -05001/*
Larry Johnsonf20405e2009-01-28 15:30:02 -05002 * (C) Copyright 2007-2009
Larry Johnsonc591dff2007-12-27 11:28:51 -05003 * Larry Johnson, lrj@acm.org
4 *
Larry Johnson6433fa22008-03-17 11:10:35 -05005 * (C) Copyright 2006-2007
Larry Johnsonc591dff2007-12-27 11:28:51 -05006 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 *
8 * (C) Copyright 2006
9 * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
Larry Johnson6433fa22008-03-17 11:10:35 -050010 * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
Larry Johnsonc591dff2007-12-27 11:28:51 -050011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
Larry Johnson47ce4a22008-06-14 16:53:02 -040029#include <fdt_support.h>
Larry Johnsonc591dff2007-12-27 11:28:51 -050030#include <i2c.h>
Larry Johnson47ce4a22008-06-14 16:53:02 -040031#include <libfdt.h>
Larry Johnsonc591dff2007-12-27 11:28:51 -050032#include <ppc440.h>
Larry Johnson3259eea2008-01-17 08:50:09 -050033#include <asm/bitops.h>
Larry Johnson47ce4a22008-06-14 16:53:02 -040034#include <asm/gpio.h>
35#include <asm/io.h>
Stefan Roese6bd91382008-07-11 11:40:13 +020036#include <asm/ppc4xx-uic.h>
Larry Johnson47ce4a22008-06-14 16:53:02 -040037#include <asm/processor.h>
Stefan Roese10954932009-11-12 12:00:49 +010038#include <asm/4xx_pci.h>
Larry Johnsonc591dff2007-12-27 11:28:51 -050039
40DECLARE_GLOBAL_DATA_PTR;
41
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020042extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
Larry Johnsonc591dff2007-12-27 11:28:51 -050043
44ulong flash_get_size(ulong base, int banknum);
45
Larry Johnson6433fa22008-03-17 11:10:35 -050046#if defined(CONFIG_KORAT_PERMANENT)
47void korat_buzzer(int const on)
48{
49 if (on) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050 out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05,
51 in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05) | 0x80);
Larry Johnson6433fa22008-03-17 11:10:35 -050052 } else {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053 out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05,
54 in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x05) & ~0x80);
Larry Johnson6433fa22008-03-17 11:10:35 -050055 }
56}
57#endif
58
Larry Johnsonc591dff2007-12-27 11:28:51 -050059int board_early_init_f(void)
60{
Larry Johnson6433fa22008-03-17 11:10:35 -050061 uint32_t sdr0_pfc1, sdr0_pfc2;
62 uint32_t reg;
Larry Johnsonc591dff2007-12-27 11:28:51 -050063 int eth;
64
Larry Johnson6433fa22008-03-17 11:10:35 -050065#if defined(CONFIG_KORAT_PERMANENT)
66 unsigned mscount;
67
68 extern void korat_branch_absolute(uint32_t addr);
69
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070 for (mscount = 0; mscount < CONFIG_SYS_KORAT_MAN_RESET_MS; ++mscount) {
Larry Johnson6433fa22008-03-17 11:10:35 -050071 udelay(1000);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072 if (gpio_read_in_bit(CONFIG_SYS_GPIO_RESET_PRESSED_)) {
Larry Johnson6433fa22008-03-17 11:10:35 -050073 /* This call does not return. */
74 korat_branch_absolute(
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020075 CONFIG_SYS_FLASH1_TOP - 2 * CONFIG_ENV_SECT_SIZE - 4);
Larry Johnson6433fa22008-03-17 11:10:35 -050076 }
77 }
78 korat_buzzer(1);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020079 while (!gpio_read_in_bit(CONFIG_SYS_GPIO_RESET_PRESSED_))
Larry Johnson6433fa22008-03-17 11:10:35 -050080 udelay(1000);
81
82 korat_buzzer(0);
83#endif
84
Stefan Roesed1c3b272009-09-09 16:25:29 +020085 mtdcr(EBC0_CFGADDR, EBC0_CFG);
86 mtdcr(EBC0_CFGDATA, 0xb8400000);
Larry Johnsonc591dff2007-12-27 11:28:51 -050087
Larry Johnson3259eea2008-01-17 08:50:09 -050088 /*
Larry Johnsonc591dff2007-12-27 11:28:51 -050089 * Setup the interrupt controller polarities, triggers, etc.
Larry Johnson3259eea2008-01-17 08:50:09 -050090 */
Stefan Roese952e7762009-09-24 09:55:50 +020091 mtdcr(UIC0SR, 0xffffffff); /* clear all */
92 mtdcr(UIC0ER, 0x00000000); /* disable all */
93 mtdcr(UIC0CR, 0x00000005); /* ATI & UIC1 crit are critical */
94 mtdcr(UIC0PR, 0xfffff7ff); /* per ref-board manual */
95 mtdcr(UIC0TR, 0x00000000); /* per ref-board manual */
96 mtdcr(UIC0VR, 0x00000000); /* int31 highest, base=0x000 */
97 mtdcr(UIC0SR, 0xffffffff); /* clear all */
Larry Johnsonc591dff2007-12-27 11:28:51 -050098
Stefan Roese952e7762009-09-24 09:55:50 +020099 mtdcr(UIC1SR, 0xffffffff); /* clear all */
100 mtdcr(UIC1ER, 0x00000000); /* disable all */
101 mtdcr(UIC1CR, 0x00000000); /* all non-critical */
102 mtdcr(UIC1PR, 0xffffffff); /* per ref-board manual */
103 mtdcr(UIC1TR, 0x00000000); /* per ref-board manual */
104 mtdcr(UIC1VR, 0x00000000); /* int31 highest, base=0x000 */
105 mtdcr(UIC1SR, 0xffffffff); /* clear all */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500106
Stefan Roese952e7762009-09-24 09:55:50 +0200107 mtdcr(UIC2SR, 0xffffffff); /* clear all */
108 mtdcr(UIC2ER, 0x00000000); /* disable all */
109 mtdcr(UIC2CR, 0x00000000); /* all non-critical */
110 mtdcr(UIC2PR, 0xffffffff); /* per ref-board manual */
111 mtdcr(UIC2TR, 0x00000000); /* per ref-board manual */
112 mtdcr(UIC2VR, 0x00000000); /* int31 highest, base=0x000 */
113 mtdcr(UIC2SR, 0xffffffff); /* clear all */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500114
Larry Johnson6433fa22008-03-17 11:10:35 -0500115 /*
116 * Take sim card reader and CF controller out of reset. Also enable PHY
117 * auto-detect until board-specific PHY resets are available.
118 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119 out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02, 0xC0);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500120
121 /* Configure the two Ethernet PHYs. For each PHY, configure for fiber
122 * if the SFP module is present, and for copper if it is not present.
123 */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500124 for (eth = 0; eth < 2; ++eth) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125 if (gpio_read_in_bit(CONFIG_SYS_GPIO_SFP0_PRESENT_ + eth)) {
Larry Johnsonc591dff2007-12-27 11:28:51 -0500126 /* SFP module not present: configure PHY for copper. */
127 /* Set PHY to autonegotate 10 MB, 100MB, or 1 GB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200128 out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03,
129 in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03) |
Larry Johnsonc591dff2007-12-27 11:28:51 -0500130 0x06 << (4 * eth));
131 } else {
132 /* SFP module present: configure PHY for fiber and
133 enable output */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134 gpio_write_bit(CONFIG_SYS_GPIO_PHY0_FIBER_SEL + eth, 1);
135 gpio_write_bit(CONFIG_SYS_GPIO_SFP0_TX_EN_ + eth, 0);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500136 }
137 }
138 /* enable Ethernet: set GPIO45 and GPIO46 to 1 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139 gpio_write_bit(CONFIG_SYS_GPIO_PHY0_EN, 1);
140 gpio_write_bit(CONFIG_SYS_GPIO_PHY1_EN, 1);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500141
Larry Johnson6433fa22008-03-17 11:10:35 -0500142 /* Wait 1 ms, then enable Fiber signal detect to PHYs. */
143 udelay(1000);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144 out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03,
145 in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x03) | 0x88);
Larry Johnson6433fa22008-03-17 11:10:35 -0500146
147 /* select Ethernet (and optionally IIC1) pins */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500148 mfsdr(SDR0_PFC1, sdr0_pfc1);
149 sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SELECT_MASK) |
Larry Johnson3259eea2008-01-17 08:50:09 -0500150 SDR0_PFC1_SELECT_CONFIG_4;
Larry Johnson6433fa22008-03-17 11:10:35 -0500151#ifdef CONFIG_I2C_MULTI_BUS
152 sdr0_pfc1 |= ((sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_IIC1_SEL);
153#endif
Larry Johnsonc591dff2007-12-27 11:28:51 -0500154 mfsdr(SDR0_PFC2, sdr0_pfc2);
155 sdr0_pfc2 = (sdr0_pfc2 & ~SDR0_PFC2_SELECT_MASK) |
Larry Johnson3259eea2008-01-17 08:50:09 -0500156 SDR0_PFC2_SELECT_CONFIG_4;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500157 mtsdr(SDR0_PFC2, sdr0_pfc2);
158 mtsdr(SDR0_PFC1, sdr0_pfc1);
159
160 /* PCI arbiter enabled */
Stefan Roesed1c3b272009-09-09 16:25:29 +0200161 mfsdr(SDR0_PCI0, reg);
162 mtsdr(SDR0_PCI0, 0x80000000 | reg);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500163
164 return 0;
165}
166
Larry Johnson6433fa22008-03-17 11:10:35 -0500167/*
168 * The boot flash on CS0 normally has its write-enable pin disabled, and so will
169 * not respond to CFI commands. This routine therefore fills in the flash
170 * information for the boot flash. (The flash at CS1 operates normally.)
171 */
172ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
173{
174 uint32_t addr;
175 int i;
176
177 if (1 != banknum)
178 return 0;
179
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180 info->size = CONFIG_SYS_FLASH0_SIZE;
181 info->sector_count = CONFIG_SYS_FLASH0_SIZE / 0x20000;
Larry Johnson6433fa22008-03-17 11:10:35 -0500182 info->flash_id = 0x01000000;
183 info->portwidth = 2;
184 info->chipwidth = 2;
185 info->buffer_size = 32;
186 info->erase_blk_tout = 16384;
187 info->write_tout = 2;
188 info->buffer_write_tout = 5;
189 info->vendor = 2;
190 info->cmd_reset = 0x00F0;
191 info->interface = 2;
192 info->legacy_unlock = 0;
193 info->manufacturer_id = 1;
194 info->device_id = 0x007E;
195
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#if CONFIG_SYS_FLASH0_SIZE == 0x01000000
Larry Johnson6433fa22008-03-17 11:10:35 -0500197 info->device_id2 = 0x2101;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#elif CONFIG_SYS_FLASH0_SIZE == 0x04000000
Larry Johnson6433fa22008-03-17 11:10:35 -0500199 info->device_id2 = 0x2301;
200#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200201#error Unable to set device_id2 for current CONFIG_SYS_FLASH0_SIZE
Larry Johnson6433fa22008-03-17 11:10:35 -0500202#endif
203
204 info->ext_addr = 0x0040;
205 info->cfi_version = 0x3133;
206 info->cfi_offset = 0x0055;
207 info->addr_unlock1 = 0x00000555;
208 info->addr_unlock2 = 0x000002AA;
209 info->name = "CFI conformant";
210 for (i = 0, addr = -info->size;
211 i < info->sector_count;
212 ++i, addr += 0x20000) {
213 info->start[i] = addr;
214 info->protect[i] = 0x00;
215 }
216 return 1;
217}
218
Larry Johnsonc591dff2007-12-27 11:28:51 -0500219static int man_data_read(unsigned int addr)
220{
221 /*
222 * Read an octet of data from address "addr" in the manufacturer's
223 * information serial EEPROM, or -1 on error.
224 */
225 u8 data[2];
226
227 if (0 != i2c_probe(MAN_DATA_EEPROM_ADDR) ||
228 0 != i2c_read(MAN_DATA_EEPROM_ADDR, addr, 1, data, 1)) {
229 debug("man_data_read(0x%02X) failed\n", addr);
230 return -1;
231 }
232 debug("man_info_read(0x%02X) returned 0x%02X\n", addr, data[0]);
233 return data[0];
234}
235
236static unsigned int man_data_field_addr(unsigned int const field)
237{
238 /*
239 * The manufacturer's information serial EEPROM contains a sequence of
240 * zero-delimited fields. Return the starting address of field "field",
241 * or 0 on error.
242 */
243 unsigned addr, i;
244
245 if (0 == field || 'A' != man_data_read(0) || '\0' != man_data_read(1))
246 /* Only format "A" is currently supported */
247 return 0;
248
249 for (addr = 2, i = 1; i < field && addr < 256; ++addr) {
250 if ('\0' == man_data_read(addr))
251 ++i;
252 }
253 return (addr < 256) ? addr : 0;
254}
255
256static char *man_data_read_field(char s[], unsigned const field,
257 unsigned const length)
258{
259 /*
260 * Place the null-terminated contents of field "field" of length
261 * "length" from the manufacturer's information serial EEPROM into
262 * string "s[length + 1]" and return a pointer to s, or return 0 on
263 * error. In either case the original contents of s[] is not preserved.
264 */
265 unsigned addr, i;
266
267 addr = man_data_field_addr(field);
268 if (0 == addr || addr + length >= 255)
269 return 0;
270
271 for (i = 0; i < length; ++i) {
272 int const c = man_data_read(addr++);
273
274 if (c <= 0)
275 return 0;
276
277 s[i] = (char)c;
278 }
279 if (0 != man_data_read(addr))
280 return 0;
281
282 s[i] = '\0';
283 return s;
284}
285
286static void set_serial_number(void)
287{
288 /*
289 * If the environmental variable "serial#" is not set, try to set it
290 * from the manufacturer's information serial EEPROM.
291 */
Larry Johnson6433fa22008-03-17 11:10:35 -0500292 char s[MAN_INFO_LENGTH + MAN_MAC_ADDR_LENGTH + 2];
Larry Johnsonc591dff2007-12-27 11:28:51 -0500293
Larry Johnson6433fa22008-03-17 11:10:35 -0500294 if (getenv("serial#"))
295 return;
296
297 if (!man_data_read_field(s, MAN_INFO_FIELD, MAN_INFO_LENGTH))
298 return;
299
300 s[MAN_INFO_LENGTH] = '-';
301 if (!man_data_read_field(s + MAN_INFO_LENGTH + 1, MAN_MAC_ADDR_FIELD,
302 MAN_MAC_ADDR_LENGTH))
303 return;
304
305 setenv("serial#", s);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500306}
307
308static void set_mac_addresses(void)
309{
310 /*
311 * If the environmental variables "ethaddr" and/or "eth1addr" are not
312 * set, try to set them from the manufacturer's information serial
313 * EEPROM.
314 */
Larry Johnson6433fa22008-03-17 11:10:35 -0500315
316#if MAN_MAC_ADDR_LENGTH % 2 != 0
317#error MAN_MAC_ADDR_LENGTH must be an even number
318#endif
319
320 char s[(3 * MAN_MAC_ADDR_LENGTH) / 2];
321 char *src;
322 char *dst;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500323
324 if (0 != getenv("ethaddr") && 0 != getenv("eth1addr"))
325 return;
326
Larry Johnson6433fa22008-03-17 11:10:35 -0500327 if (0 == man_data_read_field(s + (MAN_MAC_ADDR_LENGTH / 2) - 1,
328 MAN_MAC_ADDR_FIELD, MAN_MAC_ADDR_LENGTH))
Larry Johnsonc591dff2007-12-27 11:28:51 -0500329 return;
330
Larry Johnson6433fa22008-03-17 11:10:35 -0500331 for (src = s + (MAN_MAC_ADDR_LENGTH / 2) - 1, dst = s; src != dst;) {
332 *dst++ = *src++;
333 *dst++ = *src++;
334 *dst++ = ':';
335 }
Larry Johnsonc591dff2007-12-27 11:28:51 -0500336 if (0 == getenv("ethaddr"))
337 setenv("ethaddr", s);
338
339 if (0 == getenv("eth1addr")) {
Larry Johnson6433fa22008-03-17 11:10:35 -0500340 ++s[((3 * MAN_MAC_ADDR_LENGTH) / 2) - 2];
Larry Johnsonc591dff2007-12-27 11:28:51 -0500341 setenv("eth1addr", s);
342 }
343}
344
Larry Johnsonc591dff2007-12-27 11:28:51 -0500345int misc_init_r(void)
346{
Larry Johnson6433fa22008-03-17 11:10:35 -0500347 uint32_t pbcr;
348 int size_val;
349 uint32_t reg;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500350 unsigned long usb2d0cr = 0;
351 unsigned long usb2phy0cr, usb2h0cr = 0;
352 unsigned long sdr0_pfc1;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200353 uint32_t const flash1_size = gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE;
Larry Johnson6433fa22008-03-17 11:10:35 -0500354 char const *const act = getenv("usbact");
Larry Johnsonf20405e2009-01-28 15:30:02 -0500355 char const *const usbcf = getenv("korat_usbcf");
Larry Johnsonc591dff2007-12-27 11:28:51 -0500356
Larry Johnson6433fa22008-03-17 11:10:35 -0500357 /*
358 * Re-do FLASH1 sizing and adjust flash start and offset.
359 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200360 gd->bd->bi_flashstart = CONFIG_SYS_FLASH1_TOP - flash1_size;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500361 gd->bd->bi_flashoffset = 0;
362
Stefan Roesed1c3b272009-09-09 16:25:29 +0200363 mtdcr(EBC0_CFGADDR, PB1CR);
364 pbcr = mfdcr(EBC0_CFGDATA);
Larry Johnson6433fa22008-03-17 11:10:35 -0500365 size_val = ffs(flash1_size) - 21;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500366 pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200367 mtdcr(EBC0_CFGADDR, PB1CR);
368 mtdcr(EBC0_CFGDATA, pbcr);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500369
370 /*
371 * Re-check to get correct base address
372 */
373 flash_get_size(gd->bd->bi_flashstart, 0);
374
Larry Johnson6433fa22008-03-17 11:10:35 -0500375 /*
376 * Re-do FLASH1 sizing and adjust flash offset to reserve space for
377 * environment
378 */
379 gd->bd->bi_flashoffset =
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200380 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - CONFIG_SYS_FLASH1_ADDR;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500381
Stefan Roesed1c3b272009-09-09 16:25:29 +0200382 mtdcr(EBC0_CFGADDR, PB1CR);
383 pbcr = mfdcr(EBC0_CFGDATA);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200384 size_val = ffs(gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE) - 21;
Larry Johnson6433fa22008-03-17 11:10:35 -0500385 pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
Stefan Roesed1c3b272009-09-09 16:25:29 +0200386 mtdcr(EBC0_CFGADDR, PB1CR);
387 mtdcr(EBC0_CFGDATA, pbcr);
Larry Johnson6433fa22008-03-17 11:10:35 -0500388
389 /* Monitor protection ON by default */
390#if defined(CONFIG_KORAT_PERMANENT)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200391 (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
392 CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
Larry Johnson6433fa22008-03-17 11:10:35 -0500393 flash_info + 1);
394#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200395 (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
396 CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
Larry Johnson6433fa22008-03-17 11:10:35 -0500397 flash_info);
398#endif
Larry Johnsonc591dff2007-12-27 11:28:51 -0500399 /* Env protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200400 (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR,
401 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
Larry Johnson6433fa22008-03-17 11:10:35 -0500402 flash_info);
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200403 (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND,
404 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Larry Johnson6433fa22008-03-17 11:10:35 -0500405 flash_info);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500406
407 /*
408 * USB suff...
409 */
Larry Johnsonf20405e2009-01-28 15:30:02 -0500410 /*
411 * Select the USB controller on the 440EPx ("ppc") or on the PCI bus
412 * ("pci") for the CompactFlash.
413 */
414 if (usbcf != NULL && (strcmp(usbcf, "ppc") == 0)) {
415 /*
416 * If environment variable "usbcf" is defined and set to "ppc",
417 * then connect the CompactFlash controller to the PowerPC USB
418 * port.
419 */
420 printf("Attaching CompactFalsh controller to PPC USB\n");
421 out_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02,
422 in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0x02) | 0x10);
423 } else {
424 if (usbcf != NULL && (strcmp(usbcf, "pci") != 0))
425 printf("Warning: \"korat_usbcf\" is not set to a legal "
426 "value (\"ppc\" or \"pci\")\n");
427
428 printf("Attaching CompactFalsh controller to PCI USB\n");
429 }
Larry Johnsonc591dff2007-12-27 11:28:51 -0500430 if (act == NULL || strcmp(act, "hostdev") == 0) {
431 /* SDR Setting */
432 mfsdr(SDR0_PFC1, sdr0_pfc1);
433 mfsdr(SDR0_USB2D0CR, usb2d0cr);
434 mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
435 mfsdr(SDR0_USB2H0CR, usb2h0cr);
436
Larry Johnson3259eea2008-01-17 08:50:09 -0500437 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
438 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
439 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
440 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ;
441 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
442 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS;
443 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
444 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST;
445 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
446 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500447
Larry Johnson3259eea2008-01-17 08:50:09 -0500448 /*
449 * An 8-bit/60MHz interface is the only possible alternative
450 * when connecting the Device to the PHY
451 */
452 usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
453 usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500454
Larry Johnson3259eea2008-01-17 08:50:09 -0500455 /*
456 * To enable the USB 2.0 Device function
457 * through the UTMI interface
458 */
459 usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
460 usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500461
Larry Johnson3259eea2008-01-17 08:50:09 -0500462 sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
463 sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500464
465 mtsdr(SDR0_PFC1, sdr0_pfc1);
466 mtsdr(SDR0_USB2D0CR, usb2d0cr);
467 mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
468 mtsdr(SDR0_USB2H0CR, usb2h0cr);
469
Larry Johnson3259eea2008-01-17 08:50:09 -0500470 /* clear resets */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500471 udelay(1000);
472 mtsdr(SDR0_SRST1, 0x00000000);
473 udelay(1000);
474 mtsdr(SDR0_SRST0, 0x00000000);
475
476 printf("USB: Host(int phy) Device(ext phy)\n");
477
478 } else if (strcmp(act, "dev") == 0) {
479 /*-------------------PATCH-------------------------------*/
480 mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
481
Larry Johnson3259eea2008-01-17 08:50:09 -0500482 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
483 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
484 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
485 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS;
486 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
487 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST;
488 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
489 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500490 mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
491
492 udelay(1000);
493 mtsdr(SDR0_SRST1, 0x672c6000);
494
495 udelay(1000);
496 mtsdr(SDR0_SRST0, 0x00000080);
497
498 udelay(1000);
499 mtsdr(SDR0_SRST1, 0x60206000);
500
501 *(unsigned int *)(0xe0000350) = 0x00000001;
502
503 udelay(1000);
504 mtsdr(SDR0_SRST1, 0x60306000);
505 /*-------------------PATCH-------------------------------*/
506
507 /* SDR Setting */
508 mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
509 mfsdr(SDR0_USB2H0CR, usb2h0cr);
510 mfsdr(SDR0_USB2D0CR, usb2d0cr);
511 mfsdr(SDR0_PFC1, sdr0_pfc1);
512
Larry Johnson3259eea2008-01-17 08:50:09 -0500513 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
514 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
515 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
516 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ;
517 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
518 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN;
519 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
520 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV;
521 usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
522 usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500523
Larry Johnson3259eea2008-01-17 08:50:09 -0500524 usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
525 usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500526
Larry Johnson3259eea2008-01-17 08:50:09 -0500527 usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
528 usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500529
Larry Johnson3259eea2008-01-17 08:50:09 -0500530 sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
531 sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500532
533 mtsdr(SDR0_USB2H0CR, usb2h0cr);
534 mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
535 mtsdr(SDR0_USB2D0CR, usb2d0cr);
536 mtsdr(SDR0_PFC1, sdr0_pfc1);
537
Larry Johnson3259eea2008-01-17 08:50:09 -0500538 /* clear resets */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500539 udelay(1000);
540 mtsdr(SDR0_SRST1, 0x00000000);
541 udelay(1000);
542 mtsdr(SDR0_SRST0, 0x00000000);
543
544 printf("USB: Device(int phy)\n");
545 }
546
Larry Johnson3259eea2008-01-17 08:50:09 -0500547 mfsdr(SDR0_SRST1, reg); /* enable security/kasumi engines */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500548 reg &= ~(SDR0_SRST1_CRYP0 | SDR0_SRST1_KASU0);
549 mtsdr(SDR0_SRST1, reg);
550
551 /*
552 * Clear PLB4A0_ACR[WRP]
553 * This fix will make the MAL burst disabling patch for the Linux
554 * EMAC driver obsolete.
555 */
Stefan Roesed1c3b272009-09-09 16:25:29 +0200556 reg = mfdcr(PLB4_ACR) & ~PLB4_ACR_WRP;
557 mtdcr(PLB4_ACR, reg);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500558
559 set_serial_number();
560 set_mac_addresses();
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200561 gpio_write_bit(CONFIG_SYS_GPIO_ATMEGA_RESET_, 1);
Larry Johnson6433fa22008-03-17 11:10:35 -0500562
Larry Johnsonc591dff2007-12-27 11:28:51 -0500563 return 0;
564}
565
566int checkboard(void)
567{
568 char const *const s = getenv("serial#");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200569 u8 const rev = in_8((u8 *) CONFIG_SYS_CPLD_BASE + 0);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500570
571 printf("Board: Korat, Rev. %X", rev);
Larry Johnson6433fa22008-03-17 11:10:35 -0500572 if (s)
Larry Johnsonc591dff2007-12-27 11:28:51 -0500573 printf(", serial# %s", s);
574
Larry Johnson6433fa22008-03-17 11:10:35 -0500575 printf(".\n Ethernet PHY 0: ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200576 if (gpio_read_out_bit(CONFIG_SYS_GPIO_PHY0_FIBER_SEL))
Larry Johnsonc591dff2007-12-27 11:28:51 -0500577 printf("fiber");
578 else
579 printf("copper");
580
581 printf(", PHY 1: ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200582 if (gpio_read_out_bit(CONFIG_SYS_GPIO_PHY1_FIBER_SEL))
Larry Johnsonc591dff2007-12-27 11:28:51 -0500583 printf("fiber");
584 else
585 printf("copper");
586
587 printf(".\n");
Larry Johnson6433fa22008-03-17 11:10:35 -0500588#if defined(CONFIG_KORAT_PERMANENT)
589 printf(" Executing permanent copy of U-Boot.\n");
590#endif
591 return 0;
Larry Johnsonc591dff2007-12-27 11:28:51 -0500592}
593
Larry Johnson47ce4a22008-06-14 16:53:02 -0400594#if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP)
595/*
596 * Assign interrupts to PCI devices.
597 */
Stefan Roesea760b022009-11-12 16:41:09 +0100598void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
Larry Johnson47ce4a22008-06-14 16:53:02 -0400599{
Stefan Roese6bd91382008-07-11 11:40:13 +0200600 pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIRQ2);
Larry Johnson47ce4a22008-06-14 16:53:02 -0400601}
602#endif
603
Larry Johnson3259eea2008-01-17 08:50:09 -0500604/*
Larry Johnson3259eea2008-01-17 08:50:09 -0500605 * pci_target_init
Larry Johnsonc591dff2007-12-27 11:28:51 -0500606 *
Larry Johnson3259eea2008-01-17 08:50:09 -0500607 * The bootstrap configuration provides default settings for the pci
608 * inbound map (PIM). But the bootstrap config choices are limited and
609 * may not be sufficient for a given board.
610 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200611#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
Larry Johnsonc591dff2007-12-27 11:28:51 -0500612void pci_target_init(struct pci_controller *hose)
613{
Stefan Roese10954932009-11-12 12:00:49 +0100614 /* First do 440EP(x) common setup */
615 __pci_target_init(hose);
Larry Johnsonc591dff2007-12-27 11:28:51 -0500616
Larry Johnson3259eea2008-01-17 08:50:09 -0500617 /*
618 * Set up Configuration registers for on-board NEC uPD720101 USB
619 * controller.
620 */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500621 pci_write_config_dword(PCI_BDF(0x0, 0xC, 0x0), 0xE4, 0x00000020);
622}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200623#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
Larry Johnsonc591dff2007-12-27 11:28:51 -0500624
Larry Johnson47ce4a22008-06-14 16:53:02 -0400625#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
626void ft_board_setup(void *blob, bd_t *bd)
627{
628 u32 val[4];
629 int rc;
630
631 ft_cpu_setup(blob, bd);
632
633 /* Fixup NOR mapping */
634 val[0] = 1; /* chip select number */
635 val[1] = 0; /* always 0 */
636 val[2] = gd->bd->bi_flashstart;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200637 val[3] = gd->bd->bi_flashsize - CONFIG_SYS_FLASH0_SIZE;
Larry Johnson47ce4a22008-06-14 16:53:02 -0400638 rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
639 val, sizeof(val), 1);
640 if (rc)
641 printf("Unable to update property NOR mapping, err=%s\n",
642 fdt_strerror(rc));
643}
644#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */