blob: 1c14b83a9d9565702f432cd9f3ea6560c4c89e2e [file] [log] [blame]
TsiChung Liew8e585f02007-06-18 13:50:13 -05001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Alison Wangaa0d99f2012-03-26 21:49:05 +00005 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChung Liew8e585f02007-06-18 13:50:13 -05006 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
TsiChung Liew8e585f02007-06-18 13:50:13 -050027#include <config.h>
TsiChungLiew427c8142007-07-05 22:54:42 -050028#include <common.h>
29#include <asm/immap.h>
Alison Wangaa0d99f2012-03-26 21:49:05 +000030#include <asm/io.h>
TsiChung Liew8e585f02007-06-18 13:50:13 -050031
32DECLARE_GLOBAL_DATA_PTR;
33
34int checkboard(void)
35{
36 puts("Board: ");
37 puts("Freescale FireEngine 5329 EVB\n");
38 return 0;
39};
40
Becky Bruce9973e3c2008-06-09 16:03:40 -050041phys_size_t initdram(int board_type)
TsiChung Liew8e585f02007-06-18 13:50:13 -050042{
Alison Wangaa0d99f2012-03-26 21:49:05 +000043 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
TsiChung Liew8e585f02007-06-18 13:50:13 -050044 u32 dramsize, i;
45
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChung Liew8e585f02007-06-18 13:50:13 -050047
48 for (i = 0x13; i < 0x20; i++) {
49 if (dramsize == (1 << i))
50 break;
51 }
52 i--;
53
Alison Wangaa0d99f2012-03-26 21:49:05 +000054 out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
55 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
56 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChung Liew8e585f02007-06-18 13:50:13 -050057
58 /* Issue PALL */
Alison Wangaa0d99f2012-03-26 21:49:05 +000059 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew8e585f02007-06-18 13:50:13 -050060
61 /* Issue LEMR */
Alison Wangaa0d99f2012-03-26 21:49:05 +000062 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
63 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
TsiChung Liew8e585f02007-06-18 13:50:13 -050064
65 udelay(500);
66
67 /* Issue PALL */
Alison Wangaa0d99f2012-03-26 21:49:05 +000068 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew8e585f02007-06-18 13:50:13 -050069
70 /* Perform two refresh cycles */
Alison Wangaa0d99f2012-03-26 21:49:05 +000071 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
72 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew8e585f02007-06-18 13:50:13 -050073
Alison Wangaa0d99f2012-03-26 21:49:05 +000074 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew8e585f02007-06-18 13:50:13 -050075
Alison Wangaa0d99f2012-03-26 21:49:05 +000076 out_be32(&sdram->ctrl,
77 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
TsiChung Liew8e585f02007-06-18 13:50:13 -050078
79 udelay(100);
80
81 return dramsize;
82};
83
84int testdram(void)
85{
86 /* TODO: XXX XXX XXX */
87 printf("DRAM test not implemented!\n");
88
89 return (0);
90}