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Alexey Brodkin5396e8b2018-01-24 21:37:14 +03001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
4 */
5
6#ifndef _CONFIG_IOT_DEVKIT_H_
7#define _CONFIG_IOT_DEVKIT_H_
8
9#include <linux/sizes.h>
10
11/*
12 * MEMORY MAP
13 *
14 * eFlash: 0x0000_0000 - 0x0008_0000 (512K)
15 * ICCM: 0x2000_0000 - 0x2004_0000 (256K)
16 * SRAM: 0x3000_0000 - 0x3002_0000 (128K)
17 * DCCM: 0x8000_0000 - 0x8002_0000 (128K)
18 * Note: only data goes here, as IFQ cannot fetch instructions from DCCM
19 *
20 *
21 * RAM PARTITIONING
22 *
23 * +-----------+----------+---------------------+-------------+
24 * | <-- Stack | .data | Malloc | Environment |
25 * +-----------+----------+---------------------+-------------+
26 * : : : :\___________/
27 * : : : : |
28 * : : : : CONFIG_ENV_SIZE
29 * : : \____________________/
30 * : : |
31 * : : CONFIG_SYS_MALLOC_LEN
32 * : :
Tom Rinieaf6ea62022-05-25 12:16:03 -040033 * : Specified explicitly by CONFIG_CUSTOM_SYS_INIT_SP_ADDR
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030034 * :
Tom Riniaa6e94d2022-11-16 13:10:37 -050035 * Specified explicitly by CFG_SYS_SDRAM_BASE
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030036 *
37 * NOTES:
Tom Rinieaf6ea62022-05-25 12:16:03 -040038 * - Stack starts from CONFIG_CUSTOM_SYS_INIT_SP_ADDR and grows down,
Tom Riniaa6e94d2022-11-16 13:10:37 -050039 * i.e. towards CFG_SYS_SDRAM_BASE but nothing stops it from crossing
40 * that CFG_SYS_SDRAM_BASE in which case data won't be really saved on
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030041 * stack any longer and values popped from stack will contain garbage
42 * leading to unexpected behavior, typically but not limited to:
43 * - "Returning" back to bogus caller function
44 * - Reading data from weird addresses
45 */
46
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030047#define SRAM_BASE 0x30000000
48#define SRAM_SIZE SZ_128K
49
50#define DCCM_BASE 0x80000000
51#define DCCM_SIZE SZ_128K
52
Tom Riniaa6e94d2022-11-16 13:10:37 -050053#define CFG_SYS_SDRAM_BASE DCCM_BASE
54#define CFG_SYS_SDRAM_SIZE DCCM_SIZE
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030055
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030056#define ROM_BASE CONFIG_SYS_MONITOR_BASE
57#define ROM_SIZE SZ_256K
58
Tom Rinieaf6ea62022-05-25 12:16:03 -040059#define RAM_DATA_BASE SYS_INIT_SP_ADDR
Tom Riniaa6e94d2022-11-16 13:10:37 -050060#define RAM_DATA_SIZE CFG_SYS_SDRAM_SIZE - \
Tom Rinieaf6ea62022-05-25 12:16:03 -040061 (SYS_INIT_SP_ADDR - \
Tom Riniaa6e94d2022-11-16 13:10:37 -050062 CFG_SYS_SDRAM_BASE) - \
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030063 CONFIG_SYS_MALLOC_LEN - \
64 CONFIG_ENV_SIZE
Alexey Brodkin5396e8b2018-01-24 21:37:14 +030065#endif /* _CONFIG_IOT_DEVKIT_H_ */