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Sricharana9c1c042011-11-15 09:50:06 -05001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
5 *
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
8 *
9 * Configuration settings for the TI EVM5430 board.
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#ifndef __CONFIG_H
31#define __CONFIG_H
32
33/*
34 * High Level Configuration Options
35 */
36#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
37#define CONFIG_OMAP /* in a TI OMAP core */
38#define CONFIG_OMAP54XX /* which is a 54XX */
39#define CONFIG_OMAP5430 /* which is in a 5430 */
40#define CONFIG_5430EVM /* working with EVM */
Sricharana9c1c042011-11-15 09:50:06 -050041
42/* Get CPU defs */
43#include <asm/arch/cpu.h>
44#include <asm/arch/omap.h>
45
46/* Display CPU and Board Info */
47#define CONFIG_DISPLAY_CPUINFO
48#define CONFIG_DISPLAY_BOARDINFO
49
50/* Clock Defines */
SRICHARAN R7a4bf202012-03-12 02:25:44 +000051#define V_OSCK 19200000 /* Clock output from T2 */
Sricharana9c1c042011-11-15 09:50:06 -050052#define V_SCLK V_OSCK
SRICHARAN R7a4bf202012-03-12 02:25:44 +000053#define CONFIG_SYS_CLOCKS_ENABLE_ALL 1 /* Enable all clocks */
54#define CONFIG_SYS_ENABLE_PADS_ALL 1 /* Enable all PADS for now */
Sricharana9c1c042011-11-15 09:50:06 -050055
56#undef CONFIG_USE_IRQ /* no support for IRQs */
57#define CONFIG_MISC_INIT_R
58
59#define CONFIG_OF_LIBFDT
60
61#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
62#define CONFIG_SETUP_MEMORY_TAGS
63#define CONFIG_INITRD_TAG
64
65/*
66 * Size of malloc() pool
67 * Total Size Environment - 128k
68 * Malloc - add 256k
69 */
70#define CONFIG_ENV_SIZE (128 << 10)
71#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
72/* Vector Base */
73#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
74
75/*
76 * Hardware drivers
77 */
78
79/*
80 * serial port - NS16550 compatible
81 */
82#define V_NS16550_CLK 48000000
83
84#define CONFIG_SYS_NS16550
85#define CONFIG_SYS_NS16550_SERIAL
86#define CONFIG_SYS_NS16550_REG_SIZE (-4)
87#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
88#define CONFIG_CONS_INDEX 3
89#define CONFIG_SYS_NS16550_COM3 UART3_BASE
90
91#define CONFIG_BAUDRATE 115200
92#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
93 115200}
94/* I2C */
95#define CONFIG_HARD_I2C
96#define CONFIG_SYS_I2C_SPEED 100000
97#define CONFIG_SYS_I2C_SLAVE 1
98#define CONFIG_DRIVER_OMAP34XX_I2C
99#define CONFIG_I2C_MULTI_BUS
100
SRICHARAN R21144292012-03-12 02:25:48 +0000101/* TWL6035 */
102#ifndef CONFIG_SPL_BUILD
103#define CONFIG_TWL6035_POWER
104#endif
105
Sricharana9c1c042011-11-15 09:50:06 -0500106/* MMC */
107#define CONFIG_GENERIC_MMC
108#define CONFIG_MMC
109#define CONFIG_OMAP_HSMMC
110#define CONFIG_DOS_PARTITION
111
112/* MMC ENV related defines */
113#define CONFIG_ENV_IS_IN_MMC
114#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
115#define CONFIG_ENV_OFFSET 0xE0000
Balaji T K328aeca2012-03-12 02:25:50 +0000116#define CONFIG_CMD_SAVEENV
Sricharana9c1c042011-11-15 09:50:06 -0500117
Sricharana9c1c042011-11-15 09:50:06 -0500118#define CONFIG_SYS_CONSOLE_IS_IN_ENV
119
120/* Flash */
121#define CONFIG_SYS_NO_FLASH
122
123/* Cache */
124#define CONFIG_SYS_CACHELINE_SIZE 64
125#define CONFIG_SYS_CACHELINE_SHIFT 6
126
127/* commands to include */
128#include <config_cmd_default.h>
129
130/* Enabled commands */
131#define CONFIG_CMD_EXT2 /* EXT2 Support */
132#define CONFIG_CMD_FAT /* FAT support */
133#define CONFIG_CMD_I2C /* I2C serial bus support */
134#define CONFIG_CMD_MMC /* MMC support */
135#define CONFIG_CMD_SAVEENV
136
137/* Disabled commands */
138#undef CONFIG_CMD_NET
139#undef CONFIG_CMD_NFS
140#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
141#undef CONFIG_CMD_IMLS /* List all found images */
142
143/*
144 * Environment setup
145 */
146
147#define CONFIG_BOOTDELAY 3
148
149#define CONFIG_ENV_OVERWRITE
150
151#define CONFIG_EXTRA_ENV_SETTINGS \
152 "loadaddr=0x82000000\0" \
SRICHARAN R7a4bf202012-03-12 02:25:44 +0000153 "console=ttyO2,115200n8\0" \
Sricharana9c1c042011-11-15 09:50:06 -0500154 "usbtty=cdc_acm\0" \
155 "vram=16M\0" \
156 "mmcdev=0\0" \
157 "mmcroot=/dev/mmcblk0p2 rw\0" \
158 "mmcrootfstype=ext3 rootwait\0" \
159 "mmcargs=setenv bootargs console=${console} " \
160 "vram=${vram} " \
161 "root=${mmcroot} " \
162 "rootfstype=${mmcrootfstype}\0" \
163 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
164 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
165 "source ${loadaddr}\0" \
166 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
167 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
168 "run mmcargs; " \
169 "bootm ${loadaddr}\0" \
170
171#define CONFIG_BOOTCOMMAND \
172 "if mmc rescan ${mmcdev}; then " \
173 "if run loadbootscript; then " \
174 "run bootscript; " \
175 "else " \
176 "if run loaduimage; then " \
177 "run mmcboot; " \
178 "fi; " \
179 "fi; " \
180 "fi"
181
182#define CONFIG_AUTO_COMPLETE 1
183
184/*
185 * Miscellaneous configurable options
186 */
187
188#define CONFIG_SYS_LONGHELP /* undef to save memory */
189#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Sricharana9c1c042011-11-15 09:50:06 -0500190#define CONFIG_SYS_PROMPT "OMAP5430 EVM # "
191#define CONFIG_SYS_CBSIZE 256
192/* Print Buffer Size */
193#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
194 sizeof(CONFIG_SYS_PROMPT) + 16)
195#define CONFIG_SYS_MAXARGS 16
196/* Boot Argument Buffer Size */
197#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
198
199/*
200 * memtest setup
201 */
202#define CONFIG_SYS_MEMTEST_START 0x80000000
203#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
204
205/* Default load address */
206#define CONFIG_SYS_LOAD_ADDR 0x80000000
207
208/* Use General purpose timer 1 */
209#define CONFIG_SYS_TIMERBASE GPT2_BASE
210#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
211#define CONFIG_SYS_HZ 1000
212
213/*
214 * Stack sizes
215 *
216 * The stack sizes are set up in start.S using the settings below
217 */
218#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
219#ifdef CONFIG_USE_IRQ
220#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
221#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
222#endif
223
224/*
225 * SDRAM Memory Map
226 * Even though we use two CS all the memory
227 * is mapped to one contiguous block
228 */
229#define CONFIG_NR_DRAM_BANKS 1
230
231#define CONFIG_SYS_SDRAM_BASE 0x80000000
232#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
233#define CONFIG_SYS_INIT_RAM_SIZE 0x800
234#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
235 CONFIG_SYS_INIT_RAM_SIZE - \
236 GENERATED_GBL_DATA_SIZE)
237
238#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
239
240/* Defines for SDRAM init */
241#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
242#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
243#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
244#endif
245
246/* Defines for SPL */
247#define CONFIG_SPL
SRICHARAN R7a4bf202012-03-12 02:25:44 +0000248#define CONFIG_SPL_TEXT_BASE 0x40300350
249#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
Sricharana9c1c042011-11-15 09:50:06 -0500250#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
251
Sricharana9c1c042011-11-15 09:50:06 -0500252#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
253#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
254#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
255#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
256
257#define CONFIG_SPL_LIBCOMMON_SUPPORT
258#define CONFIG_SPL_LIBDISK_SUPPORT
259#define CONFIG_SPL_I2C_SUPPORT
260#define CONFIG_SPL_MMC_SUPPORT
261#define CONFIG_SPL_FAT_SUPPORT
262#define CONFIG_SPL_LIBGENERIC_SUPPORT
263#define CONFIG_SPL_SERIAL_SUPPORT
Thomas Weberd1df0fd2012-05-14 10:28:54 +0000264#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
Sricharana9c1c042011-11-15 09:50:06 -0500265
266/*
Sricharana9c1c042011-11-15 09:50:06 -0500267 * 64 bytes before this address should be set aside for u-boot.img's
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000268 * header. That is 80E7FFC0--0x80E80000 should not be used for any
Sricharana9c1c042011-11-15 09:50:06 -0500269 * other needs.
270 */
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000271#define CONFIG_SYS_TEXT_BASE 0x80E80000
272
273/*
274 * BSS and malloc area 64MB into memory to allow enough
275 * space for the kernel at the beginning of memory
276 */
277#define CONFIG_SPL_BSS_START_ADDR 0x84000000
278#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
279#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
280#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
Sricharana9c1c042011-11-15 09:50:06 -0500281
282#endif /* __CONFIG_H */